isl22416 Intersil Corporation, isl22416 Datasheet

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isl22416

Manufacturer Part Number
isl22416
Description
Low Noise, Low Power, Spi? Bus, 128 Taps
Manufacturer
Intersil Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
isl22416UFU10Z
Manufacturer:
Intersil
Quantity:
950
Part Number:
isl22416WFU10Z
Manufacturer:
Intersil
Quantity:
800
Part Number:
isl22416WFU10Z-TK
Manufacturer:
INTERSIL
Quantity:
1 400
Low Noise, Low Power, SPI
The ISL22416 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wiper is controlled by the user through the SPI
serial interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVR to the WR.
The DCP can be used as three-terminal potentiometer or as
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal
processing.
Pinout
Ordering Information
NOTES:
ISL22416UFU10Z
(Notes 1, 2)
ISL22416WFU10Z
(Notes 1, 2)
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
2. Add “-TK” suffix for 1,000 Tape and Reel option
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PART NUMBER
SHDN
SDO
SCK
SDI
CS
1
2
3
4
5
(10 LD MSOP)
416UZ
416WZ
TOP VIEW
ISL22416
PART MARKING
®
1
Data Sheet
10
9
8
7
6
®
Bus, 128 Taps
VCC
RH
RW
RL
GND
1-888-INTERSIL or 1-888-468-3774
RESISTANCE OPTION
Single Digitally Controlled Potentiometer (XDCP™)
(kΩ)
10
50
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• 128 resistor taps
• SPI serial interface
• Non-volatile storage of wiper position
• Wiper resistance: 70Ω typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kΩ or 10kΩ total resistance
• High reliability
• 10 Lead MSOP
• Pb-free plus anneal product (RoHS compliant)
|
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @
Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
TEMP. RANGE
-40 to +125
-40 to +125
All other trademarks mentioned are the property of their respective owners.
June 23, 2006
(°C)
Copyright Intersil Americas Inc. 2006. All Rights Reserved
10 Ld MSOP
(Pb-Free)
10 Ld MSOP
(Pb-Free)
PACKAGE
ISL22416
T
55
M10.118
M10.118
PKG. DWG. #
FN6227.0
°
C

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isl22416 Summary of contents

Page 1

... Data Sheet ® Low Noise, Low Power, SPI The ISL22416 integrates a single digitally controlled potentiometer (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wiper is controlled by the user through the SPI serial interface ...

Page 2

... SDI SHDN 6 GND ISL22416 V CC Power up Interface, SPI Control and Status Logic IVR Non-volatile Register GND SPI interface clock input Push-pull/Open Drain Data Output of the SPI serial interface Data Input of the SPI serial interface Chip Select active low input ...

Page 3

... V (Note 11, 19) RESISTOR MODE (Measurements between R RINL Integral Non-linearity (Note 15) RDNL Differential Non-linearity (Note 14) 3 ISL22416 Thermal Information Thermal Resistance (Typical, Note 3) 10 Lead MSOP +0.3 CC Recommended Operating Conditions CC Temperature Range (Extended Industrial .-40°C to +125°C Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C V ...

Page 4

... SERIAL INTERFACE SPECIFICATIONS V SHDN, SCK, SDI, and CS Input Buffer IL LOW Voltage V SHDN, SCK, SDI, and CS Input Buffer IH HIGH Voltage 4 ISL22416 TEST CONDITIONS W option U option TEST CONDITIONS f = 5MHz; (for SPI Active, Read and SCK Volatile Write states only 5MHz; (for SPI Active, Read and ...

Page 5

... Write sequence of SPI serial interface, to the end of the self-timed internal non-volatile write cycle specified for the highest data rate transfer for the device. Higher value pull-up can be used at lower data rates. pu 19. This parameter is not 100% tested. 5 ISL22416 TEST CONDITIONS I = 4mA OL Maximum is determined ...

Page 6

... SCK MSB SDI High Impedance SDO Output Timing CS SCK t V MSB SDO ADDR SDI XDCP Timing (for All Load Instructions) CS SCK MSB SDI V W High Impedance SDO 6 ISL22416 t CYC ... ... ... t HO ... ... ... LAG t RI LSB t DIS LSB t ...

Page 7

... TAP POSITION (DECIMAL) FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 1.30 10k 1.10 0.90 0.70 0.50 Vcc = 5.5V 0.30 0.10 50k -0.10 -0.30 -40 - TEMPERATURE (ºC) FIGURE 5. ZSerror vs TEMPERATURE 7 ISL22416 1.4 1.2 1 0.8 0.6 0.4 Vcc = 3.3V -40ºC 0 100 120 2.7 0 25ºC 0.1 0 -0.1 -0.2 80 100 120 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER ...

Page 8

... FIGURE 9. END TO END R % CHANGE vs TOTAL TEMPERATURE 300 250 10k 200 150 100 TAP POSITION (DECIMAL) FIGURE 11. TC FOR Rheostat MODE IN ppm FOR 50kΩ (U) 8 ISL22416 (Continued) 0.4 0.2 -0.2 -0.4 -0.6 96 116 FIGURE 8. INL vs TAP POSITION IN Rheostat MODE FOR 105 50k 10k ...

Page 9

... CS LOW enables the ISL22416, placing it in the active power mode. A HIGH to LOW transition required prior to the start of any operation after power up. When CS is HIGH, the ISL22416 is deselected and the SDO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. ...

Page 10

... All communication over the SPI interface is conducted by sending the MSB of each byte of data first. Protocol Conventions The first byte sent to the ISL22416 from the SPI host is the Identification Byte. A valid Identification Byte contains 0101 as the four MSBs, with the following four bits set to 0. ...

Page 11

... The internal non-volatile write cycle starts after rising edge of CS and takes up to 20ms. Read Operation A read operation to the ISL22416 is a three byte operation. It requires first, the CS transition from HIGH to LOW, then a valid Identification Byte, then a valid instruction byte followed by “dummy” Data Byte is sent to SDI pin. The SPI host reads the data from SDO pin on falling edge of SCK ...

Page 12

... Read the data from WR (Addr 00h) Send the ID byte, Instruction Byte, then Read the Data byte ISL22416 (Sent to DI (Sent to DI) ...

Page 13

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 ISL22416 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE SYMBOL ...

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