PIC16F688T-I/SL Microchip Technology, PIC16F688T-I/SL Datasheet - Page 298

IC MCU PIC FLASH 4KX14 14SOIC

PIC16F688T-I/SL

Manufacturer Part Number
PIC16F688T-I/SL
Description
IC MCU PIC FLASH 4KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F688T-I/SL

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Controller Family/series
PIC16F
No. Of I/o's
12
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F688T-I/SL
PIC16F688T-I/SLTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F688T-I/SL
Manufacturer:
BOURNS
Quantity:
45 000
Part Number:
PIC16F688T-I/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16F688T-I/SL
0
PICmicro MID-RANGE MCU FAMILY
17.4.1.2
DS31017A-page 17-22
Slave Reception
When the R/W bit of the address byte is clear and an address match occurs, the R/W bit of the
SSPSTAT register is cleared. The received address is loaded into the SSPBUF register.
When the address byte overflow condition exists, then no acknowledge (ACK) pulse is given. An
overflow condition is defined as either the BF bit (SSPSTAT<0>) is set or the SSPOV bit
(SSPCON1<6>) is set.
An SSP interrupt is generated for each data transfer byte. The SSPIF flag bit must be cleared in
software. The SSPSTAT register is used to determine the status of the received byte.
Note:
The SSPBUF will be loaded if the SSPOV bit is set and the BF flag bit is cleared. If
a read of the SSPBUF was performed, but the user did not clear the state of the
SSPOV bit before the next receive occurred. The ACK is not sent and the SSPBUF
is updated.
Preliminary
1997 Microchip Technology Inc.

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