PIC18F45J10-I/P Microchip Technology, PIC18F45J10-I/P Datasheet - Page 325

• Manufacturer Part Number: PIC18F45J10-I/P
• Description: IC PIC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F45J10-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: MSSP/SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163022, DM183040
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 23-16:
TABLE 23-20: MASTER SSP I
FIGURE 23-17:
© 2007 Microchip Technology Inc.
Param.
90
91
92
93
Note 1:
No.
SCLx
SDAx
Note:
T
T
T
T
Symbol
SU
SU
HD
HD
Maximum pin capacitance = 10 pF for all I
Refer to Figure 23-3 for load conditions.
SDAx
Out
SDAx
In
SCLx
:
:
:
:
STA
STO
Note:
STA
STO
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
90
Refer to Figure 23-3 for load conditions.
MASTER SSP I
MASTER SSP I
Condition
Start
90
103
Characteristic
91
91
2
109
C™ BUS START/STOP BITS REQUIREMENTS
2
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
2
1 MHz mode
C™ BUS START/STOP BITS TIMING WAVEFORMS
C™ BUS DATA TIMING
100
Preliminary
106
(1)
(1)
(1)
2
(1)
C™ pins.
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
PIC18F45J10 FAMILY
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
Min
107
Max
—
—
—
—
—
—
—
—
—
—
—
—
92
92
Units
Condition
ns
ns
ns
ns
102
Stop
110
Only relevant for
Repeated Start
condition
After this period, the
first clock pulse is
generated
93
DS39682C-page 323
Conditions