PIC18F45J10-I/P Microchip Technology, PIC18F45J10-I/P Datasheet - Page 348
![IC PIC MCU FLASH 16KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F45J10-I/P
Manufacturer Part Number
PIC18F45J10-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
7.PIC18F44J10-IPT.pdf
(358 pages)
Specifications of PIC18F45J10-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
MSSP/SPI/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163022, DM183040
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45J10-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18F45J10-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18F45J10-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F45J10-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F45J10 FAMILY
Indexed Literal Offset Mode .............................................. 288
Indirect Addressing ............................................................. 62
INFSNZ ............................................................................. 263
Initialization Conditions for All Registers ....................... 43–46
Instruction Cycle.................................................................. 51
Instruction Flow/Pipelining .................................................. 51
Instruction Set ................................................................... 241
DS39682C-page 346
Clocking Scheme ........................................................ 51
ADDLW ..................................................................... 247
ADDWF ..................................................................... 247
ADDWF (Indexed Literal Offset Mode) ..................... 289
ADDWFC .................................................................. 248
ANDLW ..................................................................... 248
ANDWF ..................................................................... 249
BC ............................................................................. 249
BCF ........................................................................... 250
BN ............................................................................. 250
BNC .......................................................................... 251
BNN .......................................................................... 251
BNOV ........................................................................ 252
BNZ ........................................................................... 252
BOV .......................................................................... 255
BRA........................................................................... 253
BSF ........................................................................... 253
BSF (Indexed Literal Offset Mode) ........................... 289
BTFSC ...................................................................... 254
BTFSS ...................................................................... 254
BTG........................................................................... 255
BZ ............................................................................. 256
CALL ......................................................................... 256
CLRF......................................................................... 257
CLRWDT................................................................... 257
COMF ....................................................................... 258
CPFSEQ ................................................................... 258
CPFSGT ................................................................... 259
CPFSLT .................................................................... 259
DAW.......................................................................... 260
DCFSNZ ................................................................... 261
DECF ........................................................................ 260
DECFSZ.................................................................... 261
Extended Instruction Set ........................................... 283
General Format ......................................................... 243
GOTO ....................................................................... 262
INCF.......................................................................... 262
INCFSZ ..................................................................... 263
INFSNZ ..................................................................... 263
IORLW ...................................................................... 264
IORWF ...................................................................... 264
LFSR ......................................................................... 265
MOVF........................................................................ 265
MOVFF ..................................................................... 266
MOVLB ..................................................................... 266
MOVLW .................................................................... 267
MOVWF .................................................................... 267
MULLW ..................................................................... 268
MULWF ..................................................................... 268
NEGF ........................................................................ 269
NOP .......................................................................... 269
Opcode Field Descriptions ........................................ 242
POP .......................................................................... 270
PUSH ........................................................................ 270
RCALL ...................................................................... 271
RESET ...................................................................... 271
RETFIE ..................................................................... 272
RETLW ..................................................................... 272
Preliminary
INTCON Registers.............................................................. 81
Inter-Integrated Circuit. See I
Internal Oscillator Block ...................................................... 26
Internal RC Oscillator
Internet Address ............................................................... 353
Interrupt Sources .............................................................. 229
Interrupts............................................................................. 79
Interrupts, Flag Bits
INTOSC, INTRC. See Internal Oscillator Block.
IORLW .............................................................................. 264
IORWF .............................................................................. 264
IPR Registers...................................................................... 88
L
LFSR................................................................................. 265
M
Master Clear (MCLR).......................................................... 39
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ......................................................... 47
Memory Programming Requirements............................... 307
Microchip Internet Web Site.............................................. 353
MOVF ............................................................................... 265
MOVFF ............................................................................. 266
MOVLB ............................................................................. 266
MOVLW ............................................................................ 267
MOVSF ............................................................................. 285
MOVSS............................................................................. 286
MOVWF ............................................................................ 267
MPLAB ASM30 Assembler, Linker, Librarian ................... 292
MPLAB ICD 2 In-Circuit Debugger ................................... 293
MPLAB ICE 2000 High-Performance Universal
RETURN................................................................... 273
RLCF ........................................................................ 273
RLNCF...................................................................... 274
RRCF........................................................................ 274
RRNCF ..................................................................... 275
SETF ........................................................................ 275
SETF (Indexed Literal Offset Mode) ......................... 289
SLEEP ...................................................................... 276
Standard Instructions................................................ 241
SUBFWB .................................................................. 276
SUBLW ..................................................................... 277
SUBWF..................................................................... 277
SUBWFB .................................................................. 278
SWAPF ..................................................................... 278
TBLRD ...................................................................... 279
TBLWT ..................................................................... 280
TSTFSZ .................................................................... 281
XORLW .................................................................... 281
XORWF .................................................................... 282
Use with WDT........................................................... 235
A/D Conversion Complete ........................................ 213
Capture Complete (CCP).......................................... 125
Compare Complete (CCP)........................................ 126
Interrupt-on-Change (RB7:RB4) ................................. 97
INTn Pin...................................................................... 91
PORTB, Interrupt-on-Change ..................................... 91
TMR0 .......................................................................... 91
TMR0 Overflow......................................................... 113
TMR1 Overflow......................................................... 115
TMR2-to-PR2 Match (PWM)............................. 128, 133
Interrupt-on-Change (RB7:RB4) Flag (RBIF Bit) ........ 97
Data Memory .............................................................. 53
Program Memory ........................................................ 47
In-Circuit Emulator .................................................... 293
© 2007 Microchip Technology Inc.
2
C Mode.