PIC18LF14K50-I/SO Microchip Technology, PIC18LF14K50-I/SO Datasheet - Page 297

• Manufacturer Part Number: PIC18LF14K50-I/SO
• Description: IC PIC MCU FLASH 16KB 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K50-I/SO

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 24-5:
REGISTER 24-6:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6-4
bit 3
bit 2-0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-1
MCLRE
BKBUG
R/P-1
(1)
BKBUG is only used for the ICD device. Otherwise, this bit is unimplemented and reads as ‘1’.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RA3 input pin disabled
0 = RA3 input pin enabled; MCLR disabled
Unimplemented: Read as ‘0’
HFOFST: HFINTOSC Fast Start-up bit
1 = HFINTOSC starts clocking the CPU without waiting for the oscillator to stabilize.
0 = The system clock is held off until the HFINTOSC is stable.
Unimplemented: Read as ‘0’
BKBUG: Background Debugger Enable bit
1 = Background debugger disabled
0 = Background debugger functions enabled
ENHCPU: Enhanced CPU Enable bit
1 = Enhanced CPU enabled
0 = Enhanced CPU disabled
Unimplemented: Read as ‘0’
BBSIZ: Boot BLock Size Select bit
1 = 2 kW boot block size for PIC18F14K50/PIC18LF14K50 (1 kW boot block size for
0 = 1 kW boot block size for PIC18F14K50/PIC18LF14K50 (512 W boot block size for
LVP: Single-Supply ICSP™ Enable bit
1 = Single-Supply ICSP enabled
0 = Single-Supply ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
ENHCPU
R/W-0
PIC18F13K50/PIC18LF13K50)
PIC18F13K50/PIC18LF13K50)
U-0
—
CONFIG3H: CONFIGURATION REGISTER 3 HIGH
CONFIG4L: CONFIGURATION REGISTER 4 LOW
P = Programmable bit
P = Programmable bit
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
(1)
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
HFOFST
BBSIZ
R/P-1
R/P-0
PIC18F/LF1XK50
R/P-1
LVP
U-0
—
U-0
U-0
—
—
DS41350E-page 297
STVREN
R/P-1
U-0
—
bit 0
bit 0