PIC18LF14K50-I/SO Microchip Technology, PIC18LF14K50-I/SO Datasheet - Page 413

• Manufacturer Part Number: PIC18LF14K50-I/SO
• Description: IC PIC MCU FLASH 16KB 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K50-I/SO

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

RESET ............................................................................. 339
Reset State of Registers .................................................. 284
Resets ...................................................................... 277, 291
RETFIE ............................................................................ 340
RETLW ............................................................................ 340
RETURN .......................................................................... 341
Return Address Stack ........................................................ 30
Return Stack Pointer (STKPTR) ........................................ 31
Revision History ............................................................... 405
RLCF ................................................................................ 341
RLNCF ............................................................................. 342
RRCF ............................................................................... 342
RRNCF ............................................................................ 343
S
SCK .................................................................................. 139
SDI ................................................................................... 139
SDO ................................................................................. 139
SEC_IDLE Mode .............................................................. 238
SEC_RUN Mode .............................................................. 236
Serial Clock, SCK ............................................................ 139
Serial Data In (SDI) .......................................................... 139
Serial Data Out (SDO) ..................................................... 139
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 343
Shoot-through Current ..................................................... 132
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 139
Slave Select Synchronization .......................................... 145
 2010 Microchip Technology Inc.
REFCON0 ................................................................ 247
REFCON1 ................................................................ 248
REFCON2 ................................................................ 248
SLRCON (PORT Slew Rate Control) ....................... 100
SRCON0 (SR Latch Control 0) ................................ 242
SRCON1 (SR Latch Control 1) ................................ 243
SSPADD (MSSP Address and Baud Rate, SPI Mode) ..
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 141
SSPCON2 (MSSP Control 2, I
SSPMSK (SSP Mask) .............................................. 158
SSPSTAT (MSSP Status, SPI Mode) .............. 140, 149
STATUS ..................................................................... 45
STKPTR (Stack Pointer) ............................................ 31
T0CON (Timer0 Control) .......................................... 101
T1CON (Timer1 Control) .......................................... 105
T2CON (Timer2 Control) .......................................... 111
T3CON (Timer3 Control) .......................................... 113
TRISA (Tri-State PORTA) .......................................... 85
TRISB (Tri-State PORTB) .................................... 90, 94
TXSTA (Transmit Status and Control) ..................... 190
UCFG (USB Configuration) ...................................... 254
UCON (USB Control) ............................................... 252
UEIE (USB Error Interrupt Enable) .......................... 270
UEIR (USB Error Interrupt Status) ........................... 269
UEPn (USB Endpoint n Control) .............................. 257
UIE (USB Interrupt Enable) ...................................... 268
UIR (USB Interrupt Status) ...................................... 266
USTAT (USB Status) ............................................... 256
WDTCON (Watchdog Timer Control) ...................... 303
WPUA (Weak Pull-up PORTA) .................................. 86
WPUB (Weak Pull-up PORTB) .................................. 91
Brown-out Reset (BOR) ........................................... 291
Oscillator Start-up Timer (OST) ............................... 291
Power-on Reset (POR) ............................................ 291
Power-up Timer (PWRT) ......................................... 291
159
2
2
C Mode) ................. 150
C Mode) ................. 151
Preliminary
SLEEP ............................................................................. 344
Sleep Mode ..................................................................... 237
SLRCON Register ........................................................... 100
Software Simulator (MPLAB SIM) ................................... 361
SPBRG ............................................................................ 193
SPBRGH ......................................................................... 193
Special Event Trigger ...................................................... 213
Special Event Trigger. See Compare (ECCP Mode).
Special Features of the CPU ........................................... 291
Special Function Registers ................................................ 39
SPI Mode
SPI Mode (MSSP)
SR Latch .......................................................................... 241
SRCON0 Register ........................................................... 242
SRCON1 Register ........................................................... 243
SS .................................................................................... 139
SSP
SSPADD Register ............................................................ 159
SSPCON1 Register ................................................. 141, 150
SSPCON2 Register ......................................................... 151
SSPMSK Register ........................................................... 158
SSPOV ............................................................................ 171
SSPOV Status Flag ......................................................... 171
SSPSTAT Register .................................................. 140, 149
Stack Full/Underflow Resets .............................................. 32
Standard Instructions ....................................................... 309
STATUS Register .............................................................. 45
STKPTR Register .............................................................. 31
SUBFSR .......................................................................... 355
SUBFWB ......................................................................... 344
SUBLW ............................................................................ 345
SUBULNK ........................................................................ 355
SUBWF ............................................................................ 345
SUBWFB ......................................................................... 346
SWAPF ............................................................................ 346
T
T0CON Register .............................................................. 101
T1CON Register .............................................................. 105
T2CON Register .............................................................. 111
T3CON Register .............................................................. 113
Table Pointer Operations (table) ........................................ 54
Table Reads/Table Writes ................................................. 32
TBLRD ............................................................................. 347
TBLWT ............................................................................ 348
Thermal Considerations ................................................... 377
Map ............................................................................ 40
Typical Master/Slave Connection ............................ 143
Associated Registers ............................................... 147
Bus Mode Compatibility ........................................... 147
Effects of a Reset .................................................... 147
Enabling SPI I/O ...................................................... 143
Master Mode ............................................................ 144
Operation ................................................................. 142
Operation in Power Managed Modes ...................... 147
Serial Clock ............................................................. 139
Serial Data In ........................................................... 139
Serial Data Out ........................................................ 139
Slave Mode .............................................................. 145
Slave Select ............................................................. 139
Slave Select Synchronization .................................. 145
SPI Clock ................................................................. 144
Typical Connection .................................................. 143
Associated Registers ............................................... 243
Typical SPI Master/Slave Connection ..................... 143
R/W Bit ............................................................ 152, 153
PIC18F/LF1XK50
DS41350E-page 413