PIC18LF24J50-I/ML Microchip Technology, PIC18LF24J50-I/ML Datasheet - Page 150
![IC PIC MCU FLASH 16K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF24J50-I/ML
Manufacturer Part Number
PIC18LF24J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF24J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, MA180024, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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- Download datasheet (9Mb)
PIC18F46J50 FAMILY
REGISTER 9-9:
REGISTER 9-10:
REGISTER 9-11:
DS39931C-page 150
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
U-0
U-0
U-0
—
—
—
Unimplemented: Read as ‘0’
T0CKR<4:0>: Timer0 External Clock Input (T0CKI) to the Corresponding RPn Pin bits
Unimplemented: Read as ‘0’
T3CKR<4:0>: Timer 3 External Clock Input (T3CKI) to the Corresponding RPn Pin bits
Unimplemented: Read as ‘0’
IC1R<4:0>: Assign Input Capture 1 (ECCP1) to the Corresponding RPn Pin bits
U-0
U-0
U-0
—
—
—
RPINR4: PERIPHERAL PIN SELECT INPUT REGISTER 4 (BANKED EEAh)
RPINR6: PERIPHERAL PIN SELECT INPUT REGISTER 6 (BANKED EECh)
RPINR7: PERIPHERAL PIN SELECT INPUT REGISTER 7 (BANKED EEDh)
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
U-0
—
—
—
T0CKR4
T3CKR4
R/W-1
R/W-1
R/W-1
IC1R4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T0CKR3
T3CKR3
R/W-1
R/W-1
R/W-1
IC1R3
T0CKR2
T3CKR2
R/W-1
R/W-1
R/W-1
IC1R2
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
T0CKR1
T3CKR1
R/W-1
R/W-1
R/W-1
IC1R1
T0CKR0
T3CKR0
R/W-1
R/W-1
R/W-1
IC1R0
bit 0
bit 0
bit 0
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