PIC18LF24J50-I/ML Microchip Technology, PIC18LF24J50-I/ML Datasheet - Page 541
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PIC18LF24J50-I/ML
Manufacturer Part Number
PIC18LF24J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF24J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, MA180024, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Data Memory ..................................................................... 78
DAW ................................................................................. 450
DC Characteristics ........................................................... 498
DCFSNZ .......................................................................... 451
DECF ............................................................................... 450
DECFSZ ........................................................................... 451
Development Support ...................................................... 481
Device Differences ........................................................... 537
Device Overview ................................................................ 11
Direct Addressing ............................................................... 92
E
Effect on Standard PICMCU Instructions ......................... 478
Electrical Characteristics .................................................. 485
Enhanced Capture/Compare/PWM (ECCP) .................... 239
Enhanced Universal Synchronous Asynchronous Receiver
Equations
© 2009 Microchip Technology Inc.
Indirect ....................................................................... 91
Inherent and Literal .................................................... 91
Access Bank .............................................................. 80
Bank Select Register (BSR) ....................................... 78
Extended Instruction Set ............................................ 93
General Purpose Registers ........................................ 80
Memory Maps
Special Function Registers ........................................ 81
USB RAM ................................................................... 78
Power-Down and Supply Current ............................ 488
Supply Voltage ......................................................... 487
Details on Individual Family Members ....................... 12
Features (28-Pin Devices) ......................................... 13
Features (44-Pin Devices) ......................................... 13
Other Special Features .............................................. 12
Absolute Maximum Ratings ..................................... 485
DC Characteristics ........................................... 487–498
Associated Registers ............................................... 261
Capture Mode. See Capture.
Compare Mode. See Compare.
ECCP Mode and Timer Resources .......................... 241
Enhanced PWM Mode ............................................. 247
Outputs and Configuration ....................................... 241
Transmitter (EUSART). See EUSART.
A/D Acquisition Time ................................................ 346
A/D Minimum Charging Time ................................... 346
Bytes Transmitted for a Given DMABC ................... 278
Calculating the Minimum Required Acquisition Time .....
BSR ................................................................... 96
Instructions Affected .......................................... 94
Mapping Access Bank ....................................... 96
Access Bank Special Function Registers .......... 81
Non-Access Bank Special Function Registers .. 82
PIC18F46J50 Family Devices ........................... 79
Context Defined SFRs ....................................... 83
Auto-Restart ..................................................... 256
Auto-Shutdown ................................................ 255
Direction Change in Full-Bridge Output Mode . 253
Full-Bridge Application ..................................... 251
Full-Bridge Mode ............................................. 251
Half-Bridge Application .................................... 250
Half-Bridge Application Examples ................... 257
Half-Bridge Mode ............................................. 250
Output Relationships (Active-High and Active-Low)
Output Relationships Diagram ......................... 249
Programmable Dead-Band Delay .................... 257
Shoot-Through Current .................................... 257
Start-up Considerations ................................... 254
.................................................................. 248
PIC18F46J50 FAMILY
Errata ................................................................................... 9
EUSART .......................................................................... 317
Extended Instruction Set
Extended Instructions
External Clock Input ........................................................... 32
F
Fail-Safe Clock Monitor ........................................... 413, 427
Fast Register Stack ........................................................... 75
Features Overview ............................................................... 3
Firmware Instructions ...................................................... 431
Flash Program Memory ..................................................... 97
Calculating USB Transceiver Current ...................... 374
Estimating USB Transceiver Current Consumption 373
Asynchronous Mode ................................................ 327
Baud Rate Generator
Baud Rate Generator (BRG) ................................... 321
Synchronous Master Mode ...................................... 333
Synchronous Slave Mode ........................................ 337
ADDFSR .................................................................. 474
ADDULNK ............................................................... 474
CALLW .................................................................... 475
MOVSF .................................................................... 475
MOVSS .................................................................... 476
PUSHL ..................................................................... 476
SUBFSR .................................................................. 477
SUBULNK ................................................................ 477
Considerations when Enabling ................................ 478
Interrupts in Power-Managed Modes ...................... 429
POR or Wake-up From Sleep .................................. 429
WDT During Oscillator Failure ................................. 428
Comparative Table ...................................................... 4
Associated Registers ............................................... 106
Control Registers ....................................................... 98
Erase Sequence ...................................................... 102
Erasing .................................................................... 102
Operation During Code-Protect ............................... 106
Reading ................................................................... 101
Table Pointer
346
12-Bit Break Transmit and Receive ................. 332
Associated Registers, Reception ..................... 330
Associated Registers, Transmission ............... 328
Auto-Wake-up on Sync Break ......................... 330
Receiver .......................................................... 329
Setting Up 9-Bit Mode with Address Detect .... 329
Transmitter ...................................................... 327
Operation in Power-Managed Mode ................ 321
Associated Registers ....................................... 322
Auto-Baud Rate Detect .................................... 325
Baud Rates, Asynchronous Modes ................. 323
Formulas .......................................................... 321
High Baud Rate Select (BRGH Bit) ................. 321
Sampling ......................................................... 321
Associated Registers, Reception ..................... 336
Associated Registers, Transmission ............... 334
Reception ........................................................ 335
Transmission ................................................... 333
Associated Registers, Reception ..................... 339
Associated Registers, Transmission ............... 338
Reception ........................................................ 339
Transmission ................................................... 337
EECON1 and EECON2 ..................................... 98
TABLAT (Table Latch) Register ...................... 100
TBLPTR (Table Pointer) Register .................... 100
Boundaries Based on Operation ..................... 100
DS39931C-page 541
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