AT90USB82-16MU Atmel, AT90USB82-16MU Datasheet - Page 245

• Manufacturer Part Number: AT90USB82-16MU
• Description: IC AVR MCU 8K FLASH 32QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB82-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Controller Family/series: AVR USB
• No. Of I/o's: 22
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Processor Series: AT90USBx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• Package: 32QFN EP
• Device Core: AVR
• Family Name: AT90
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7707F–AVR–11/10
Table 25-4.
Note:
Table 25-5.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Fuse High Byte
DWEN
RSTDSBL
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
(4)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1..0 results in maximum Boot Size. See
3. See
4. Never ship a product with the DWEN Fuse programmed regardless of the setting of Lock bits
1. The default value of SUT1..0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3..0 results in external Oscillator. See
3. The CKOUT Fuse allow the system clock to be output on PORTC7. See
4. See
(3)
(4)
(3)
for details.
and RSTDSBL Fuse. A programmed DWEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
See
details.
on page 34
Fuse High Byte
Fuse Low Byte
“Watchdog Timer Control Register - WDTCSR” on page 56
Table 9-1 on page 47
“System Clock Prescaler” on page 34
Bit No
for details.
7
6
5
4
3
2
1
0
Bit No
7
6
5
4
3
2
1
0
Description
Enable debugWIRE (and disable
Reset capability
Disable Reset (pin can be used as
general purpose I/O)
Enable Serial Program and Data
Downloading
Watchdog Timer always ON
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
details)
Select Boot Size (see
details)
Select Bootloader Address as Reset
Vector
for details.
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
Table 25-6
Table 25-6
for
for
AT90USB82/162
Default Value : 0xD9
1 (unprogrammed, debugWIRE
disabled)
1 (unprogrammed, Reset
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM
not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed, Reset vector
@0x0000)
Default Value : 0x5E
0 (programmed)
1 (unprogrammed)
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
for details.
Table 6-1 on page 29
Table 23-8 on page 239
“Clock Output Buffer”
(2)
(2)
(1)
(2)
(3)
(1)
(2)
(2)
(2)
for
245