PIC24HJ12GP201-I/P Microchip Technology, PIC24HJ12GP201-I/P Datasheet - Page 19

IC PIC MCU FLASH 4KX24 18DIP

PIC24HJ12GP201-I/P

Manufacturer Part Number
PIC24HJ12GP201-I/P
Description
IC PIC MCU FLASH 4KX24 18DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ12GP201-I/P

Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit or 6-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
3.0
The
separate program and data memory spaces and
buses. This architecture also allows the direct access
of program memory from the data space during code
execution.
FIGURE 3-1:
© 2007 Microchip Technology Inc.
Note:
PIC24HJ12GP201/202
MEMORY ORGANIZATION
This data sheet summarizes the features
of the PIC24HJ12GP201/202 devices. It is
not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“PIC24H
Please see the Microchip web site
(www.microchip.com)
PIC24H
chapters.
PROGRAM MEMORY FOR PIC24HJ12GP201/202 DEVICES
Family
Family
Reference
architecture
Reference
for
the
Manual”.
Manual
features
PIC24HJ12GP201/202
latest
Interrupt Vector Table
Alternate Vector Table
Device Configuration
GOTO Instruction
(4K instructions)
Preliminary
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
Registers
DEVID (2)
Reserved
Reserved
PIC24HJ12GP201/202
3.1
The
PIC24HJ12GP201/202 devices is 4M instructions. The
space is addressable by a 24-bit value derived either
from the 23-bit Program Counter (PC) during program
execution, or from table operation or data space
remapping as described in Section 3.4 “Interfacing
Program and Data Memory Spaces”.
User application access to the program memory space is
restricted to the lower half of the address range (0x000000
to 0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to the
Configuration bits and Device ID sections of the
configuration memory space.
The memory map for the PIC24HJ12GP201/202 device is
shown in Figure 3-1.
program
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x001FFE
0x002000
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
Program Address Space
address
memory
DS70282B-page 17
space
of
the

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