ATMEGA8515L-8PU Atmel, ATMEGA8515L-8PU Datasheet - Page 174

IC AVR MCU 8K 8MHZ 3V 40DIP

ATMEGA8515L-8PU

Manufacturer Part Number
ATMEGA8515L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA8515L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
512Byte
# I/os (max)
35
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP W
Controller Family/series
AVR MEGA
No. Of I/o's
35
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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174
ATmega8515(L)
Wrloop:
Rdloop:
Return:
not
Do_spm:
Wait_spm:
; re-enable the RWW section
ldi
rcallDo_spm
; transfer data from RAM to Flash page buffer
ldi
ldi
ld
ld
ldi
rcallDo_spm
adiw ZH:ZL, 2
sbiw loophi:looplo, 2
brne Wrloop
; execute page write
subi ZL, low(PAGESIZEB)
sbci ZH, high(PAGESIZEB)
ldi
rcallDo_spm
; re-enable the RWW section
ldi
rcallDo_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
sbci YH, high(PAGESIZEB)
lpm
ld
cpse r0, r1
rjmp Error
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
in
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
rcallDo_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Y+
r1, Y+
spmcrval, (1<<SPMEN)
spmcrval, (1<<PGWRT) | (1<<SPMEN)
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Z+
r1, Y+
temp1, SPMCR
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCR
;init loop variable
;not required for PAGESIZEB<=256
;use subi for PAGESIZEB<=256
;restore pointer
;not required for PAGESIZEB<=256
;init loop variable
;not required for PAGESIZEB<=256
;restore pointer
;use subi for PAGESIZEB<=256
; If RWWSB is set, the RWW section is
; ready yet
2512F–AVR–12/03

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