ATMEGA8515L-8PU Atmel, ATMEGA8515L-8PU Datasheet - Page 68

• Manufacturer Part Number: ATMEGA8515L-8PU
• Description: IC AVR MCU 8K 8MHZ 3V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515L-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 35
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP W
• Controller Family/series: AVR MEGA
• No. Of I/o's: 35
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

68
ATmega8515(L)
Table 30. Overriding Signals for Alternate Functions in PB7..PB4
Table 31. Overriding Signals for Alternate Functions in PB3..PB0
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
SPE • MSTR
PB7/SCK
SPE • MSTR
PORTB7 • PUD
0
SPE • MSTR
SCK OUTPUT
0
0
SCK INPUT
–
PB3/AIN1
0
0
0
1
0
0
0
0
–
AIN1 INPUT
PB6/MISO
SPE • MSTR
PORTB6 • PUD
SPE • MSTR
0
SPE • MSTR
SPI SLAVE
OUTPUT
0
0
SPI MSTR INPUT
–
PB2/AIN0
0
0
0
0
0
0
0
0
0
AIN0 INPUT
PB5/MOSI
SPE • MSTR
PORTB5 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MSTR
OUTPUT
0
0
SPI SLAVE INPUT
–
PB1/T1
0
0
0
0
0
0
0
0
T1 INPUT
–
PB4/SS
SPE • MSTR
PORTB4 • PUD
SPE • MSTR
0
0
0
0
0
SPI SS
–
PB0/T0/OC0
0
0
0
0
OC0 ENABLE
OC0
0
0
T0 INPUT
–
2512F–AVR–12/03