PIC16F87-I/SS Microchip Technology, PIC16F87-I/SS Datasheet - Page 121

• Manufacturer Part Number: PIC16F87-I/SS
• Description: IC MCU FLASH 4KX14 EEPROM 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F87-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: SSP/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.4
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D result register
pair will NOT be updated with the partially completed
A/D conversion sample. That is, the ADRESH:ADRESL
registers will continue to contain the value of the last
completed conversion (or the last value written to the
ADRESH:ADRESL registers). After the A/D conversion
is aborted, a 2 T
acquisition is started. After this 2 T
on the selected channel is automatically started. The
GO/DONE bit can then be set to start the conversion.
In Figure 12-3, after the GO bit is set, the first time
segment has a minimum of T
FIGURE 12-3:
FIGURE 12-4:
 2003 Microchip Technology Inc.
Note:
A/D Conversions
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
T
CY
Set GO bit
Holding capacitor is disconnected from analog input (typically 100 ns)
7
to T
0000 00
AD
ADRESH
AD
wait is required before the next
Conversion starts
A/D CONVERSION T
A/D RESULT JUSTIFICATION
T
AD
Right Justified
1
CY
2 1 0 7
ADFM = 1
and a maximum of T
T
AD
b9
2
AD
10-bit Result
T
ADRESL
AD
b8
wait, acquisition
3
T
AD
b7
AD
4
0
AD
CYCLES
T
Preliminary
AD
b6
.
10-bit Result
5
T
AD
b5
6
12.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16 bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
Format Select bit (ADFM) controls this justification.
Figure 12-4 shows the operation of the A/D result
justification. The extra bits are loaded with ‘0’s. When
an A/D result will not overwrite these locations (A/D dis-
able), these registers may be used as two general
purpose 8-bit registers.
ADRES is loaded,
GO bit is cleared,
ADIF bit is set,
holding capacitor is connected to analog input
T
AD
b4
7
7
T
AD
b3
ADRESH
8
10-bit Result
A/D RESULT REGISTERS
T
AD
b2
ADFM = 0
9
Left Justified
T
0 7 6 5
AD
PIC16F87/88
b1
10 T
ADRESL
AD
b0
0000 00
11
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