PIC16F87-I/SS Microchip Technology, PIC16F87-I/SS Datasheet - Page 69

• Manufacturer Part Number: PIC16F87-I/SS
• Description: IC MCU FLASH 4KX14 EEPROM 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F87-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: SSP/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.0
The Timer0 module timer/counter has the following
features:
• 8-bit timer/counter
• Readable and writable
• 8-bit software programmable prescaler
• Internal or external clock select
• Interrupt on overflow from FFh to 00h
• Edge select for external clock
Additional information on the Timer0 module is
available in the PICmicro
Reference Manual (DS33023).
Figure 6-1 is a block diagram of the Timer0 module and
the prescaler shared with the WDT.
6.1
Timer0 operation is controlled through the OPTION
register (see Register 2-2). Timer mode is selected by
clearing bit T0CS (OPTION<5>). In Timer mode, the
Timer0 module will increment every instruction cycle
(without prescaler). If the TMR0 register is written, the
FIGURE 6-1:
 2003 Microchip Technology Inc.
Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).
RA4/T0CKI
WDT Enable bit
31.25 kHz
CLKO (= F
pin
TIMER0 MODULE
Timer0 Operation
WDT Timer
OSC
Prescaler
/4)
16-bit
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
®
Mid-Range MCU Family
0
1
0
1
T0CS
PSA
M
U
X
M
U
X
Preliminary
0
8-bit Prescaler
8 - to - 1 MUX
1
0
Time-out
8
M U X
WDT
PSA
M
U
X
increment is inhibited for the following two instruction
cycles. The user can work around this by writing an
adjusted value to the TMR0 register.
Counter mode is selected by setting bit T0CS
(OPTION<5>). In Counter mode, Timer0 will increment,
either on every rising or falling edge of pin RA4/T0CKI.
The incrementing edge is determined by the Timer0
Source Edge Select bit, T0SE (OPTION<4>). Clearing
bit T0SE selects the rising edge. Restrictions on the
external clock input are discussed in detail in Section 6.3
“Using Timer0 with an External Clock”.
The prescaler is mutually, exclusively shared between
the Timer0 module and the Watchdog Timer. The
prescaler is not readable or writable. Section 6.4
“Prescaler” details the operation of the prescaler.
6.2
The TMR0 interrupt is generated when the TMR0 reg-
ister overflows from FFh to 00h. This overflow sets bit
TMR0IF (INTCON<2>). The interrupt can be masked
by clearing bit TMR0IE (INTCON<5>). Bit TMR0IF
must be cleared in software by the Timer0 module
Interrupt Service Routine before re-enabling this inter-
rupt. The TMR0 interrupt cannot awaken the processor
from SLEEP, since the timer is shut-off during SLEEP.
Prescaler
1
Timer0 Interrupt
Cycles
Sync
PSA
2
PS2:PS0
PIC16F87/88
TMR0 reg
Data Bus
Set Flag bit TMR0IF
8
DS30487B-page 67
on Overflow