PIC18F4321-I/PT Microchip Technology, PIC18F4321-I/PT Datasheet - Page 390

• Manufacturer Part Number: PIC18F4321-I/PT
• Description: IC PIC MCU FLASH 4KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4321-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2221/2321/4221/4321 FAMILY
C
C Compilers
CALL ................................................................................ 294
CALLW ............................................................................. 323
Capture (CCP Module) ..................................................... 147
Capture (ECCP Module) .................................................. 154
Capture/Compare/PWM (CCP) ........................................ 145
Clock Sources .................................................................... 35
CLRF ................................................................................ 295
CLRWDT .......................................................................... 295
Code Examples
Code Protection ....................................................... 259, 274
COMF ............................................................................... 296
Comparator ...................................................................... 243
DS39689F-page 390
MPLAB C18 ............................................................. 330
MPLAB C30 ............................................................. 330
Associated Registers ............................................... 149
CCP Pin Configuration ............................................. 147
CCPRxH:CCPRxL Registers ................................... 147
Prescaler .................................................................. 147
Software Interrupt .................................................... 147
Timer1/Timer3 Mode Selection ................................ 147
Capture Mode. See Capture.
CCPRxH Register .................................................... 146
CCPRxL Register ..................................................... 146
Compare Mode. See Compare.
Interaction of Two CCP Modules ............................. 146
Module Configuration ............................................... 146
Pin Assignment ........................................................ 146
Timer Resources ...................................................... 146
Selecting the 31 kHz Source ...................................... 36
Selection Using OSCCON Register ........................... 36
16 x 16 Signed Multiply Routine ................................ 96
16 x 16 Unsigned Multiply Routine ............................ 96
8 x 8 Signed Multiply Routine .................................... 95
8 x 8 Unsigned Multiply Routine ................................ 95
Address Masking ..................................................... 182
Changing Between Capture Prescalers ................... 147
Computed GOTO Using an Offset Value ................... 62
Data EEPROM Read ................................................. 91
Data EEPROM Refresh Routine ................................ 92
Data EEPROM Write ................................................. 91
Erasing a Flash Program Memory Row ..................... 84
Fast Register Stack .................................................... 62
How to Clear RAM (Bank 1) Using Indirect
Implementing a Real-Time Clock Using a
Initializing PORTA .................................................... 111
Initializing PORTB .................................................... 114
Initializing PORTC .................................................... 117
Initializing PORTD .................................................... 120
Initializing PORTE .................................................... 123
Loading the SSPBUF (SSPSR) Register ................. 170
Reading a Flash Program Memory Word .................. 83
Saving STATUS, WREG and BSR
Writing to Flash Program Memory ....................... 86–87
Associated Registers ............................................... 275
Configuration Register Protection ............................ 277
Data EEPROM ......................................................... 277
Program Memory ..................................................... 275
Analog Input Connection Considerations ................. 247
Associated Registers ............................................... 247
Configuration ............................................................ 244
Addressing ......................................................... 73
Timer1 Interrupt Service .................................. 137
Registers in RAM ............................................. 109
Comparator Specifications ............................................... 350
Comparator Voltage Reference ....................................... 249
Compare (CCP Module) .................................................. 148
Compare (ECCP Module) ................................................ 154
Computed GOTO ............................................................... 62
Configuration Bits ............................................................ 259
Context Saving During Interrupts ..................................... 109
Conversion Considerations .............................................. 387
CPFSEQ .......................................................................... 296
CPFSGT .......................................................................... 297
CPFSLT ........................................................................... 297
Crystal Oscillator/Ceramic Resonator ................................ 29
Customer Change Notification Service ............................ 399
Customer Notification Service ......................................... 399
Customer Support ............................................................ 399
D
Data Addressing Modes .................................................... 73
Data EEPROM Memory ..................................................... 89
Data Memory ..................................................................... 65
Effects of a Reset .................................................... 246
Interrupts ................................................................. 246
Operation ................................................................. 245
Operation During Sleep ........................................... 246
Outputs .................................................................... 245
Reference ................................................................ 245
Response Time ........................................................ 245
Accuracy and Error .................................................. 250
Associated Registers ............................................... 251
Configuring .............................................................. 249
Connection Considerations ...................................... 250
Effects of a Reset .................................................... 250
Operation During Sleep ........................................... 250
CCPRx Register ...................................................... 148
Pin Configuration ..................................................... 148
Software Interrupt .................................................... 148
Special Event Trigger .............................. 143, 148, 242
Timer1/Timer3 Mode Selection ................................ 148
Special Event Trigger .............................................. 154
Comparing Options with the Extended
Direct ......................................................................... 73
Indexed Literal Offset ................................................ 75
Indirect ....................................................................... 73
Inherent and Literal .................................................... 73
Associated Registers ................................................. 93
EEADR Register ........................................................ 89
EECON1 Register ...................................................... 89
EECON2 Register ...................................................... 89
EEDATA Register ...................................................... 89
Operation During Code-Protect ................................. 92
Protection Against Spurious Write ............................. 92
Reading ..................................................................... 91
Using ......................................................................... 92
Write Verify ................................................................ 91
Writing ....................................................................... 91
Access Bank .............................................................. 67
and the Extended Instruction Set .............................. 75
Bank Select Register (BSR) ...................................... 65
General Purpose Registers ....................................... 67
Map for PIC18F2221/2321/4221/4321 Family ........... 66
Special Function Registers ........................................ 68
External Signal ................................................ 245
Internal Signal .................................................. 245
Instruction Set Enabled ..................................... 76
Instructions Affected .......................................... 75
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