PIC16LF872-I/SP Microchip Technology, PIC16LF872-I/SP Datasheet - Page 56

• Manufacturer Part Number: PIC16LF872-I/SP
• Description: IC MCU FLASH 2KX14 EE A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF872-I/SP

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 22
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F872
REGISTER 9-3:
DS30221C-page 54
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSPCON2: SYNC SERIAL PORT CONTROL REGISTER2 (ADDRESS: 91h)
bit 7
GCEN: General Call Enable bit (In I
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit (In I
In Master Transmit mode:
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (In I
In Master Receive mode:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of
a receive.
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (In I
In Master Receive mode:
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit. Auto-
0 = Acknowledge sequence IDLE
RCEN: Receive Enable bit (In I
1 = Enables Receive mode for I
0 = Receive IDLE
SCK Release Control:
1 = Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware.
0 = STOP condition IDLE
1 = Initiate Repeated START condition on SDA and SCL pins. Automatically cleared by
0 = Repeated START condition IDLE
1 = Initiate START condition on SDA and SCL pins. Automatically cleared by hardware.
0 = START condition IDLE
Legend:
R = Readable bit
- n = Value at POR
Note:
PEN: STOP Condition Enable bit (In I
RSEN: Repeated START Condition Enabled bit (In I
SEN: START Condition Enabled bit (In I
GCEN
R/W-0
matically cleared by hardware.
hardware.
For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I
mode, this bit may not be set (no spooling), and the SSPBUF may not be written (or
writes to the SSPBUF are disabled).
ACKSTAT
R/W-0
ACKDT
R/W-0
W = Writable bit
’1’ = Bit is set
2
2
C Master mode only).
C
2
2
C Master mode only)
C Slave mode only)
ACKEN
2
R/W-0
C Master mode only)
2
C Master mode only)
2
C Master mode only)
2
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
C Master mode only)
R/W-0
RCEN
2
C Master mode only)
R/W-0
PEN
2
© 2006 Microchip Technology Inc.
C module is not in the IDLE
x = Bit is unknown
R/W-0
RSEN
R/W-0
SEN
bit 0