PIC16LF872-I/SP Microchip Technology, PIC16LF872-I/SP Datasheet - Page 79

IC MCU FLASH 2KX14 EE A/D 28DIP

PIC16LF872-I/SP

Manufacturer Part Number
PIC16LF872-I/SP
Description
IC MCU FLASH 2KX14 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16LF872-I/SP

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
64Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF872-I/SP
Manufacturer:
MICROCLOCK
Quantity:
20 000
9.2.18.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 9-25:
FIGURE 9-26:
© 2006 Microchip Technology Inc.
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SSPIF
BCLIF
SDA
SCL
PEN
BCLIF
P
SSPIF
SDA
PEN
SCL
P
Bus Collision During a STOP
Condition
'0'
'0'
'0'
'0'
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA asserted low
Assert SDA
T
BRG
T
BRG
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0'. If the SCL pin is sampled low before
SDA is allowed to float high, a bus collision occurs. This
is a case of another master attempting to drive a data
'0' (Figure 9-25).
SCL goes low before SDA goes high,
set BCLIF
T
BRG
T
BRG
PIC16F872
'0'
'0'
SDA sampled
low after T
set BCLIF
DS30221C-page 77
BRG
,

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