PIC24FJ64GA102-I/SO Microchip Technology, PIC24FJ64GA102-I/SO Datasheet - Page 147

IC MCU 16BIT 64KB FLASH 28SOIC

PIC24FJ64GA102-I/SO

Manufacturer Part Number
PIC24FJ64GA102-I/SO
Description
IC MCU 16BIT 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GA102-I/SO

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FIGURE 12-2:
FIGURE 12-3:
 2010 Microchip Technology Inc.
Note 1:
Note 1:
Set T2IF (T4IF)
Set T3IF (T5IF)
ADC Event Trigger
2:
(T5CK)
(T4CK)
T3CK
T2CK
The timer clock input must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral
Pin Select (PPS)” for more information.
The timer clock input must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral
Pin Select (PPS)” for more information.
The ADC event trigger is available only on Timer3.
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
TIMER3 AND TIMER5 (16-BIT ASYNCHRONOUS) BLOCK DIAGRAM
TGATE
(2)
TGATE
1
0
1
0
Reset
Reset
Equal
Equal
TMR2 (TMR4)
TMR3 (TMR5)
Comparator
Comparator
PR2 (PR4)
PR3 (PR5)
PIC24FJ64GA104 FAMILY
Q
Q
Sync
Q
Q
Gate
Sync
CK
CK
D
D
T
T
CY
CY
1x
01
00
Sync
1x
00
01
TON
TON
TCS
TGATE
TCS
TGATE
(1)
(1)
(1)
(1)
TCKPS<1:0>
1, 8, 64, 256
TCKPS<1:0>
1, 8, 64, 256
Prescaler
Prescaler
2
DS39951C-page 147
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