PIC24FJ64GA102-I/SO Microchip Technology, PIC24FJ64GA102-I/SO Datasheet - Page 204

IC MCU 16BIT 64KB FLASH 28SOIC

PIC24FJ64GA102-I/SO

Manufacturer Part Number
PIC24FJ64GA102-I/SO
Description
IC MCU 16BIT 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GA102-I/SO

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC24FJ64GA104 FAMILY
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER
REGISTER 19-2:
DS39951C-page 204
bit 7-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-1
bit 0
Note 1:
U-0
U-0
2:
3:
The RCFGCAL register is only affected by a POR.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit needs to be set.
Unimplemented: Read as ‘0’
RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits
11 = Reserved; do not use
10 = RTCC source clock is selected for the RTCC pin (clock can be LPRC or SOSC, depending on the
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
PMPTTL: PMP Module TTL Input Buffer Select bit
1 = PMP module uses TTL input buffers
0 = PMP module uses Schmitt Trigger input buffers
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
.
.
.
01111111 = Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
.
.
.
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
U-0
U-0
setting of the RTCOSC bit (CW4<5>))
PADCFG1: PAD CONFIGURATION CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
RTSECSEL1
(1)
R/W-0
U-0
(1)
 2010 Microchip Technology Inc.
RTSECSEL0
x = Bit is unknown
R/W-0
U-0
(1)
(CONTINUED)
(1)
PMPTTL
R/W-0
U-0
bit 8
bit 0

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