PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 208

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PIC18F86J90-I/PT

Manufacturer Part Number
PIC18F86J90-I/PT
Description
IC PIC MCU FLASH 64KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J90-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
67
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
67
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F86J90-I/PT
0
PIC18F87J90 FAMILY
17.11 Configuring the LCD Module
The following is the sequence of steps to configure the
LCD module.
1.
2.
3.
4.
5.
DS39933D-page 208
Select the frame clock prescale using bits,
LP<3:0> (LCDPS<3:0>).
Configure the appropriate pins to function as
segment drivers using the LCDSEx registers.
Configure the appropriate pins as inputs using
the TRISx registers.
Configure the LCD module for the following
using the LCDCON register:
Write initial values to pixel data registers,
LCDDATA0 through LCDDATA23.
Multiplex and Bias mode (LMUX<1:0>)
Timing source (CS<1:0>)
Sleep mode (SLPEN)
6.
7.
8.
Configure the LCD regulator:
a)
b)
Clear LCD Interrupt Flag, LCDIF (PIR3<6>),
and if desired, enable the interrupt by setting the
LCDIE bit (PIE3<6>).
Enable the LCD module by setting the LCDEN
bit (LCDCON<7>).
If M2 or M3 bias configuration is to be used,
turn
CKSEL<1:0> (LCDREG<1:0>) to ‘00’. Set
or clear the CPEN bit (LCDREG<6>) to
select Mode 2 or Mode 3, as appropriate.
If M0 or M1 bias generation is to be used:
• Set the V
• Set or clear the CPEN bit to enable or
• Set
• Select a regulator clock source using the
bits (LCDREG<5:3>).
disable the charge pump.
(LCDREG<2>) to select the Bias mode.
CKSEL<1:0> bits.
off
or
BIAS
the
clear
 2010 Microchip Technology Inc.
level using the BIAS<2:0>
regulator
the
MODE13
by
setting
bit

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