PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 417

• Manufacturer Part Number: PIC18F86J90-I/PT
• Description: IC PIC MCU FLASH 64KB 80-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J90-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 28-10:
TABLE 28-15: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
 2010 Microchip Technology Inc.
73
73A
74
75
76
78
79
80
81
Note 1:
Param.
No.
Note:
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
SC
SC
SC
SC
SC
SC
DI
DI
B
DO
DO
DO
DO
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
Symbol
2
Refer to Figure 28-3 for load conditions.
V2
V2
H2
L2
R
F
H2
L2
B
R
F
V2
V2
SC
SC
DI
DO
DI
DO
SC
SC
L
L,
H,
L
V
V,
H,
L
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the 1st Clock Edge
of Byte 2
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time (Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge
SDO Data Output Setup to SCK Edge
81
73
MSb In
MSb
74
75, 76
Characteristic
80
bit 6 - - - - - - 1
bit 6 - - - - 1
PIC18F87J90 FAMILY
LSb In
LSb
1.5 T
Min
T
CY
20
40
79
78
—
—
—
—
—
CY
+ 40
Max Units
25
25
25
25
50
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS39933D-page 417
(Note 2)
Conditions