T89C5121-ICUIL Atmel, T89C5121-ICUIL Datasheet - Page 9
T89C5121-ICUIL
Manufacturer Part Number
T89C5121-ICUIL
Description
IC 8051 MCU W/SMART CARD 24SSOP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.89C5121-SK1.pdf
(115 pages)
Specifications of T89C5121-ICUIL
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
14
Program Memory Size
16KB (16K x 8)
Program Memory Type
Flash RAM
Eeprom Size
16K x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 5.4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
Q1468934
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
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Table 1. Ports Description (Continued)
4164G–SCR–07/06
ONLY FOR PLCC52 version
P0[7:0]
P2[7:0]
PSEN
Port
P3.6
P3.7
ALE
EA
Signal
AD[7:0]
Name
A[15:8]
PSEN
WR
RD
EA
Alternate
Internal
Supply
Power
DV
DV
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
ESD
Type
I/O
I/O
I/O
O
O
O
O
I
I
Description
Input/Output function Port 0
P0 is an 8-bit open-drain bi-directional I/O port. Port 0 pins that
have 1s written to them float and can be used as high impedance
inputs. To avoid any parasitic current consumption, Floating P0
inputs must be pulled to V
Address/Data low
Mutiplexed Address/Data LSB for external access
Input/Output function Port 2
P2 is an 8-bit open-drain bi-directional I/O port with internal pull-ups
Address high
Address Bus MSB for external access
Write signal
Write signal asserted during external data memory write operation
Read signal
Read signal asserted during external data memory read operation
Address latch enable output
The falling edge of ALE strobes the address into external latch
Program strobe enable
External access enable
This pin must be held low to force the device to fetch code from
external program memory starting at address 0000h. It is latched
during reset and cannot be dynamically changed during operation.
CC
or V
SS
.
A/T8xC5121
9
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