T89C51CC02UA-RATIM Atmel, T89C51CC02UA-RATIM Datasheet - Page 95

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T89C51CC02UA-RATIM

Manufacturer Part Number
T89C51CC02UA-RATIM
Description
IC 8051 MCU FLASH 16K 32VQFP
Manufacturer
Atmel
Series
AT89C CANr

Specifications of T89C51CC02UA-RATIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC02UARATIM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
T89C51CC02UA-RATIM
Manufacturer:
Atmel
Quantity:
10 000
4126L–CAN–01/08
Table 57. CANGSTA Register
CANGSTA (S:AAh Read Only)
CAN General Status Register
Reset Value = x0x0 0000b
Bit Number
7
-
7
6
5
4
3
2
1
0
OVFG
6
Bit Mnemonic
OVFG
ENFG
ERRP
RBSY
BOFF
TBSY
-
-
5
-
Description
Reserved
The values read from this bit is indeterminate. Do not set this bit.
Overload frame flag
This status bit is set by the hardware as long as the produced
overload frame is sent.
This flag does not generate an interrupt
Reserved
The values read from this bit is indeterminate. Do not set this bit.
Transmitter busy
This status bit is set by the hardware as long as the CAN
transmitter generates a frame (remote, data, overload or error
frame) or an ack field. This bit is also active during an InterFrame
Spacing if a frame must be sent.
This flag does not generate an interrupt.
Receiver busy
This status bit is set by the hardware as long as the CAN receiver
acquires or monitors a frame.
This flag does not generate an interrupt.
Enable on-chip CAN controller flag
Because an enable/disable command is not effective immediately,
this status bit gives the true state of a chosen mode.
This flag does not generate an interrupt.
Bus off mode
See Figure 42
Error passive mode
See Figure 42
TBSY
4
RBSY
3
AT/T89C51CC02
ENFG
2
BOFF
1
ERRP
0
95

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