T89C51CC02 Atmel, T89C51CC02 Datasheet

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T89C51CC02

Manufacturer Part Number
T89C51CC02
Description
8-Bit MCU
Manufacturer
Atmel
Datasheet

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8-bit MCU with CAN controller and Flash
1. Description
Part of the CANary
dedicated
T89C51CC02 is a low pin count 8-bit Flash
microcontroller.
While remaining fully compatible with the 80C51 it
offers a superset of this standard microcontroller. In X2
mode a maximum external clock rate of 20 MHz reaches
a 300 ns cycle time.
2. Features
Rev.A- May 17, 2001
80C51 core architecture:
A 10-bit resolution analog to digital converter (ADC)
with 8 multiplexed inputs
Full CAN controller:
256 bytes of on-chip RAM
256 bytes of on-chip ERAM
16 Kbytes of on-chip Flash memory
Read/Write cycle : 10k
Data Retention 10 years at 85 C
2 Kbytes of on-chip Flash for Bootloader
2 Kbytes of on-chip EEPROM
Read/Write cycle : 100k
14-source 4-level interrupt
Three 16-bit timer/counter
Full duplex UART compatible 80C51
maximum crystal frequency 40 MHz. In X2 mode,
20 MHz (CPU core, 40 MHz)
three or four ports: 16 or 20 digital I/O lines
two-channel 16-bit PCA with:
-
-
-
Double Data Pointer
21-bit watchdog timer (including 7 programmable
bits)
Separate power supply for analog
Fully compliant with CAN standard rev 2.0 A
and 2.0 B
Optimized
management (via SFR)
4 independent message objects:
-
PWM (8-bit)
High-speed output
Timer and edge capture
Each message object programmable on
transmission or reception
to
CAN
structure
TM
network
family of microcontrollers
for
applications,
communication
Preliminary
the
Besides the full CAN controller T89C51CC02 provides
16 Kbytes of Flash memory including In-system
Programming (ISP), 2-Kbyte Boot Flash Memory, 2-
Kbyte EEPROM and 512 bytes RAM.
Special attention is payed to the reduction of the electro-
magnetic emission of T89C51CC02.
Power saving modes:
Power supply: 5V +/- 10% ,3V +/- 10%
Temperature range: Industrial (-40 to +85 C)
Packages: PLCC28, SOIC28, (TSSOP28, SOIC24)**
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-
-
-
-
-
-
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Supports
-
-
-
1 Mbit/s maximum transfer rate at 8MHz* Crystal
frequency in X2 mode.
Readable error counters
Programmable link to on-chip Timer for Time
Stamping and Network synchronization
Independent baud rate prescaler
Data, Remote, Error and overload frame handling
Idle mode
Power down mode
individual tag and mask filters up to 29-bit
identifier/message object
8-byte cyclic data register (FIFO)/message
object
16-bit status & control register/message object
16-bit Time-Stamping register/message object
CAN specification 2.0 part A or 2.0 part B
programmable message objects
Access to message object control and data
register via SFR
Programmable reception buffer lenght up to
4 message objects
Priority management of reception of hits on
several message objects at the same time
(Basic CAN Feature)
Priority management for transmission
message object overrun interrupt
Time Triggered Communication.
Autobaud and Listening mode
Automatic reply mode programmable
T89C51CC02
1

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