AT89C5122D-RDRUM Atmel, AT89C5122D-RDRUM Datasheet - Page 143

IC 8051 MCU 32K CRAM USB 64-VQFP

AT89C5122D-RDRUM

Manufacturer Part Number
AT89C5122D-RDRUM
Description
IC 8051 MCU 32K CRAM USB 64-VQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C5122D-RDRUM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C5122D-RDRUMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5122D-RDRUM
Manufacturer:
Atmel
Quantity:
10 000
Serial Peripheral Status Register
(SPSTA)
4202F–SCR–07/2008
The
conditions:
Table 86. Serial Peripheral Status and Control Register - SPSTA (C4h)
Reset Value = 00X0XXXXb
Number
3 - 0
SPIF
Bit
Data transfer complete
Write collision
Inconsistent logic level on SS pin (mode fault error)
Serial Peripheral Status Register contains flags to signal the following
7
7
6
5
4
Mnemonic
SSERR
WCOL
MODF
WCOL
SPIF
Bit
6
-
Mode Description
R/W
RW
SSERR
R
R
R
R
5
Serial Peripheral data transfer flag
Clear by hardware to indicate data transfer is in progress or has been
approved by a clearing sequence.
Set by hardware to indicate that the data transfer has been completed.
Write Collision flag
Cleared by hardware to indicate that no collision has occurred or has
been approved by a clearing sequence.
Set by hardware to indicate that a collision has been detected.
Synchronous Serial Slave Error flag
Set by hardware when SS is modified before the end of a received data.
Cleared by disabling the SPI (clearing SPEN bit in SPCON).
Mode Fault
Cleared by hardware to indicate that the SS pin is at appropriate logic
level, or has been approved by a clearing sequence.
Set by hardware to indicate that the SS pin is at inappropriate logic level
Reserved
The value read from this bit is indeterminate. Do not change these bits.
AT83R5122, AT8xC5122/23
MODF
4
3
-
2
-
1
-
0
-
143

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