PIC18LF2320-I/SP Microchip Technology, PIC18LF2320-I/SP Datasheet - Page 112
![IC MCU FLASH 4KX16 EEPROM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2320-I/SP
Manufacturer Part Number
PIC18LF2320-I/SP
Description
IC MCU FLASH 4KX16 EEPROM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2220-ISO.pdf
(394 pages)
3.PIC18F2220-ISO.pdf
(6 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(8 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18LF2320-I/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2220-ISO PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- Current page: 112 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
FIGURE 10-12:
TABLE 10-7:
TABLE 10-8:
DS39599G-page 110
PORTD
LATD
TRISD
TRISE
CCP1CON
Legend:
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Name
Name
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
LATD Data Latch Register
PORTD Data Direction Register
P1M1
Bit 7
RD7
IBF
PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Note 1:
PSPMODE
Data Bus
WR LATD
or PORTD
RD PORTD
PORTD/CCP1 Select
RD LATD
RD TRISD
WR TRISD
PSP Read
PSP Write
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
BLOCK DIAGRAM OF RD4:RD0 PINS
P1M0
Bit 6
RD6
OBF
I/O pins have diode protection to V
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
DC1B1
IBOV
Bit 5
RD5
TRIS Latch
Data Latch
D
D
CK
CK
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Q
Q
PSPMODE
Input/output port pin or Parallel Slave Port bit 0.
Input/output port pin or Parallel Slave Port bit 1.
Input/output port pin or Parallel Slave Port bit 2.
Input/output port pin or Parallel Slave Port bit 3.
Input/output port pin or Parallel Slave Port bit 4.
Input/output port pin, Parallel Slave Port bit 5 or Enhanced PWM output P1B.
Input/output port pin, Parallel Slave Port bit 6 or Enhanced PWM output P1C.
Input/output port pin, Parallel Slave Port bit 7 or Enhanced PWM output P1D.
Q
Q
DC1B0
Bit 4
RD4
CCP1M3 CCP1M2 CCP1M1 CCP1M0
DD
1
0
Bit 3
RD3
and V
—
0
1
SS
Q
PORTE Data Direction bits
.
EN
Bit 2
RD2
EN
D
Bit 1
RD1
Function
1
0
TTL Buffer
Bit 0
RD0
V
P
N
Schmitt Trigger
Input Buffer
V
© 2007 Microchip Technology Inc.
DD
SS
xxxx xxxx
xxxx xxxx
1111 1111
0000 -111
0000 0000
POR, BOR
Value on
I/O pin
uuuu uuuu
uuuu uuuu
1111 1111
0000 -111
0000 0000
(1)
Value on
all other
Resets
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