PIC18LF2320-I/SP Microchip Technology, PIC18LF2320-I/SP Datasheet - Page 215
![IC MCU FLASH 4KX16 EEPROM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2320-I/SP
Manufacturer Part Number
PIC18LF2320-I/SP
Description
IC MCU FLASH 4KX16 EEPROM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2220-ISO.pdf
(394 pages)
3.PIC18F2220-ISO.pdf
(6 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(8 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18LF2320-I/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2220-ISO PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- Current page: 215 of 394
- Download datasheet (7Mb)
REGISTER 19-3:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-3
bit 2-0
Note 1:
R/W-0
ADFM
If the A/D F
clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
Unimplemented: Read as ‘0’
ACQT2:ACQT0: A/D Acquisition Time Select bits
111 = 20 T
110 = 16 T
101 = 12 T
100 = 8 T
011 = 6 T
010 = 4 T
001 = 2 T
000 = 0 T
ADCS2:ADCS0: A/D Conversion Clock Select bits
111 = F
110 = F
101 = F
100 = F
011 = F
010 = F
001 = F
000 = F
U-0
—
ADCON2: A/D CONTROL REGISTER 2
RC
RC
OSC
OSC
OSC
RC
OSC
OSC
OSC
AD
AD
AD
AD
AD
clock source is selected, a delay of one T
AD
AD
AD
(clock derived from A/D RC oscillator)
(clock derived from A/D RC oscillator)
/64
/16
/4
/32
/8
/2
(1)
W = Writable bit
‘1’ = Bit is set
ACQT2
R/W-0
PIC18F2220/2320/4220/4320
ACQT1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ACQT0
R/W-0
(1)
(1)
CY
(instruction cycle) is added before the A/D
ADCS2
R/W-0
x = Bit is unknown
ADCS1
R/W-0
DS39599G-page 213
ADCS0
R/W-0
bit 0
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