PIC16F877-04/P Microchip Technology, PIC16F877-04/P Datasheet - Page 288

IC MCU FLASH 8KX14 EE 40DIP

PIC16F877-04/P

Manufacturer Part Number
PIC16F877-04/P
Description
IC MCU FLASH 8KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F877-04/P

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
Package
40PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
4 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PICmicro MID-RANGE MCU FAMILY
17.3.4
DS31017A-page 17-12
Master Mode
The master can initiate the data transfer at any time because it controls the SCK. The master
determines when the slave (Processor 2,
tocol.
In master mode the data is transmitted/received as soon as the SSPBUF register is written to. If
the SPI is only going to receive, the SDO output could be disabled (programmed as an input).
The SSPSR register will continue to shift in the signal present on the SDI pin at the programmed
clock rate. As each byte is received, it will be loaded into the SSPBUF register as if a normal
received byte (interrupts and status bits appropriately set). This could be useful in receiver appli-
cations as a “line activity monitor” mode.
The clock polarity is selected by appropriately programming the CKP bit (SSPCON1<4>). This
then would give waveforms for SPI communication as shown in
Figure 17-9
user programmable to be one of the following:
• F
• F
• F
• Timer2 output/2
This allows a maximum data rate (at 20 MHz) of 8.25 Mbps.
Figure 17-6
valid before there is a clock edge on SCK. The change of the input sample is shown based on
the state of the SMP bit. The time when the SSPBUF is loaded with the received data is shown.
OSC
OSC
OSC
/4 (or T
/16 (or 4 • T
/64 (or 16 • T
where the MSb is transmitted first. In master mode, the SPI clock rate (bit rate) is
Shows the waveforms for master mode. When the CKE bit is set, the SDO data is
CY
)
CY
CY
)
)
Preliminary
Figure
17-5) is to broadcast data by the software pro-
Figure
1997 Microchip Technology Inc.
17-6,
Figure
17-8, and

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