ATMEGA32L-8AU Atmel, ATMEGA32L-8AU Datasheet - Page 44

IC AVR MCU 32K 8MHZ 3V 44TQFP

ATMEGA32L-8AU

Manufacturer Part Number
ATMEGA32L-8AU
Description
IC AVR MCU 32K 8MHZ 3V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA32x
Core
AVR8
Data Ram Size
2 KB
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
Data Rom Size
1024 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
10 mm
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Interrupts
Interrupt Vectors
in ATmega32
2503Q–AVR–02/11
This section describes the specifics of the interrupt handling as performed in ATmega32. For a
general explanation of the AVR interrupt handling, refer to
page
Table 18. Reset and Interrupt Vectors
Notes:
Table 19
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at these locations. This is also
the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the
Boot section or vice versa.
Vector No.
10
11
12
13
14
15
16
17
18
19
20
21
13.
1
2
3
4
5
6
7
8
9
1. When the BOOTRST fuse is programmed, the device will jump to the Boot Loader address at
2. When the IVSEL bit in GICR is set, interrupt vectors will be moved to the start of the Boot
shows Reset and Interrupt Vectors placement for the various combinations of
reset, see
Flash section. The address of each Interrupt Vector will then be the address in this table added
to the start address of the Boot Flash section.
Address
Program
$000
$00A
$00C
$00E
$01A
$01C
$01E
$002
$004
$006
$008
$010
$012
$014
$016
$018
$020
$022
$024
$026
$028
(1)
“Boot Loader Support – Read-While-Write Self-Programming” on page
(2)
TIMER1 COMPB
TIMER1 COMPA
TIMER2 COMP
TIMER0 COMP
USART, UDRE
TIMER1 CAPT
TIMER2 OVF
TIMER1 OVF
TIMER0 OVF
USART, RXC
USART, TXC
ANA_COMP
SPM_RDY
SPI, STC
EE_RDY
Source
RESET
INT0
INT1
INT2
ADC
TWI
Interrupt Definition
External Pin, Power-on Reset, Brown-out
Reset, Watchdog Reset, and JTAG AVR
Reset
External Interrupt Request 0
External Interrupt Request 1
External Interrupt Request 2
Timer/Counter2 Compare Match
Timer/Counter2 Overflow
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Serial Transfer Complete
USART, Rx Complete
USART Data Register Empty
USART, Tx Complete
ADC Conversion Complete
EEPROM Ready
Analog Comparator
Two-wire Serial Interface
Store Program Memory Ready
“Reset and Interrupt Handling” on
ATmega32(L)
244.
44

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