LPC11C14FBD48/301 NXP Semiconductors, LPC11C14FBD48/301 Datasheet - Page 15

• Manufacturer Part Number: LPC11C14FBD48/301
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC1100r

Specifications of LPC11C14FBD48/301

• Core Size: 32-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: Internal
• Core Processor: ARM Cortex-M0
• Speed: 50MHz
• Connectivity: CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: ARM Cortex-M0
• No. Of I/o's: 40
• Ram Memory Size: 8KB
• Cpu Speed: 50MHz
• No. Of Timers: 4
• Processor Series: LPC11
• Core: ARM Cortex M0
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 1
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5098

NXP Semiconductors
7. Functional description
LPC11CX2_CX4
Product data sheet
7.1 ARM Cortex-M0 processor
7.2 On-chip flash program memory
7.3 On-chip SRAM
7.4 Memory map
The ARM Cortex-M0 is a general purpose, 32-bit microprocessor, which offers high
performance and very low power consumption.
The LPC11Cx2/Cx4 contain 32 kB (LPC11C14/C24) or 16 kB (LPC11C12/C22) of on-chip
flash program memory.
The LPC11Cx2/Cx4 contain a total of 8 kB on-chip static RAM data memory.
The LPC11Cx2/Cx4 incorporates several distinct memory regions, shown in the following
figures.
program viewpoint following reset. The interrupt vector area supports address remapping.
The AHB peripheral area is 2 megabyte in size, and is divided to allow for up to 128
peripherals. The APB peripheral area is 512 kB in size and is divided to allow for up to 32
peripherals. Each peripheral of either type is allocated 16 kilobytes of space. This allows
simplifying the address decoding for each peripheral.
Figure 4
All information provided in this document is subject to legal disclaimers.
shows the overall map of the entire address space from the user
Rev. 2 — 3 December 2010
32-bit ARM Cortex-M0 microcontroller
LPC11Cx2/Cx4
© NXP B.V. 2010. All rights reserved.
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