LPC11C14FBD48/301 NXP Semiconductors, LPC11C14FBD48/301 Datasheet - Page 50

IC MCU 32BIT 32KB FLASH 48LQFP

LPC11C14FBD48/301

Manufacturer Part Number
LPC11C14FBD48/301
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC1100r

Specifications of LPC11C14FBD48/301

Core Size
32-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
Internal
Core Processor
ARM Cortex-M0
Speed
50MHz
Connectivity
CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
40
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
ARM Cortex-M0
No. Of I/o's
40
Ram Memory Size
8KB
Cpu Speed
50MHz
No. Of Timers
4
Processor Series
LPC11
Core
ARM Cortex M0
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
1
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-5098

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LPC11C14FBD48/301
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC11C14FBD48/301
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Part Number:
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Manufacturer:
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Quantity:
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NXP Semiconductors
11. Application information
LPC11CX2_CX4
Product data sheet
11.1 ADC usage notes
11.2 XTAL input
The following guidelines show how to increase the performance of the ADC in a noisy
environment beyond the ADC specifications listed in
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
capacitor to ground C
mode, a minimum of 200 mV(RMS) is needed.
In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF
(Figure
corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V.
The XTALOUT pin in this configuration can be left unconnected.
External components and models used in oscillation mode are shown in
Table 19
and the capacitances C
fundamental mode oscillation (the fundamental frequency is represented by L, C
R
not be larger than 7 pF. Parameters F
manufacturer (see
Fig 23. Slave mode operation of the on-chip oscillator
i
S
= 100 pF. To limit the input voltage to the specified range, choose an additional
). Capacitance C
The ADC input trace must be short and as close as possible to the LPC11Cx2/Cx4
chip.
The ADC input traces must be shielded from fast switching digital signals and noisy
power supply lines.
Because the ADC and the digital core share the same power supply, the power supply
line must be adequately filtered.
To improve the ADC performance in a very noisy environment, put the device in Sleep
mode during the ADC conversion.
23), with an amplitude between 200 mV(RMS) and 1000 mV(RMS). This
and
Table
All information provided in this document is subject to legal disclaimers.
Table
P
20. Since the feedback resistance is integrated on chip, only a crystal
in
g
Rev. 2 — 3 December 2010
which attenuates the input voltage by a factor C
Figure 24
X1
19).
and C
X2
represents the parallel package capacitance and should
need to be connected externally in case of
OSC
XTALIN
LPC1xxx
C i
100 pF
, C
L
, R
S
002aae788
32-bit ARM Cortex-M0 microcontroller
C g
and C
Table
P
are supplied by the crystal
LPC11Cx2/Cx4
7:
i
/(C
© NXP B.V. 2010. All rights reserved.
Figure 24
i
+ C
g
). In slave
L
and
and in
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