LPC11C14FBD48/301 NXP Semiconductors, LPC11C14FBD48/301 Datasheet - Page 32

• Manufacturer Part Number: LPC11C14FBD48/301
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC1100r

Specifications of LPC11C14FBD48/301

• Core Size: 32-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: Internal
• Core Processor: ARM Cortex-M0
• Speed: 50MHz
• Connectivity: CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: ARM Cortex-M0
• No. Of I/o's: 40
• Ram Memory Size: 8KB
• Cpu Speed: 50MHz
• No. Of Timers: 4
• Processor Series: LPC11
• Core: ARM Cortex M0
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 1
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5098

NXP Semiconductors
[13] 3-state outputs go into 3-state mode in Deep power-down mode.
[14] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[15] To V
Table 7.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
LPC11CX2_CX4
Product data sheet
Symbol
V
C
E
E
E
E
E
R
R
amb
IA
D
L(adj)
O
G
T
ia
vsi
i
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
T
Input resistance R
=
amb

SS
40
= 25 C; maximum sampling frequency f
.

ADC static characteristics
C to +85
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
input resistance
9.1 ADC characteristics
Figure
G
i
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
depends on the sampling frequency fs: R

) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
C unless otherwise specified; ADC frequency 4.5 MHz, V
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
6.
L(adj)
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
Figure
All information provided in this document is subject to legal disclaimers.
Conditions
s
6.
= 4.5 MHz and analog input capacitance C
Rev. 2 — 3 December 2010
Figure
i
6.
= 1 / (f
Figure
s
 C
6.
ia
).
[1][2]
[7][8]
[3]
[4]
[5]
[6]
Min
0
-
-
-
-
-
-
-
-
32-bit ARM Cortex-M0 microcontroller
DD
= 2.5 V to 3.6 V.
ia
= 1 pF.
LPC11Cx2/Cx4
Typ
-
-
-
-
-
-
-
-
-
Max
V
1
 1
 1.5
 3.5
0.6
 4
40
2.5
Figure
© NXP B.V. 2010. All rights reserved.
DD
6.
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
M
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