LPC2103FHN48,551 NXP Semiconductors, LPC2103FHN48,551 Datasheet - Page 35
![IC ARM7 MCU FLASH 32K 48-HVQFN](/photos/6/92/69297/48-hvqfn_sot778-3_pkg_sml.jpg)
LPC2103FHN48,551
Manufacturer Part Number
LPC2103FHN48,551
Description
IC ARM7 MCU FLASH 32K 48-HVQFN
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet
1.LPC2102FHN48551.pdf
(37 pages)
Specifications of LPC2103FHN48,551
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Core Processor
ARM7
Core Size
16/32-Bit
Speed
70MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC21
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
8 KB
Interface Type
I2C/JTAG/SPI/SSP/UART
Maximum Clock Frequency
70 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DB-LQFP48-LPC2103, MCB2103, MCB2103U, MCB2103UME, KSK-LPC2103-01, KSK-LPC2103-01PL, KSK-LPC2103-02
Development Tools By Supplier
OM10079, OM10081, OM10090
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48HVQFN EP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
70 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCD568-4302 - BOARD EVAL LPC210X KS2103 JLINK568-4301 - BOARD EVAL LPC210X KS2103568-4300 - BOARD EVAL LPC210X MCB2103568-4297 - BOARD EVAL LPC21XX MCB2100MCB2103UME - BOARD EVAL MCB2103 + ULINK-MEMCB2103U - BOARD EVAL MCB2103 + ULINK2MCB2103 - BOARD EVAL NXP LPC2101/2101/2103622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4690
935287391551
LPC2103FHN48-S
935287391551
LPC2103FHN48-S
NXP Semiconductors
13. Revision history
Table 9.
LPC2101_02_03_4
Product data sheet
Document ID
LPC2101_02_03_4
Modifications:
LPC2101_02_03_3
Modifications:
LPC2101_02_03_2
LPC2101_02_03_1
Revision history
Release date
20090602
20081007
20071218
20060118
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Section 6.17.4 “Code security (Code Read Protection -
CRP levels (applicable to Revision A and higher).
Section 6.17.7 “Power
Revision A and higher).
Section 10.1 “XTAL1 input”
Section 10.2 “XTAL and RTC Printed Circuit Board (PCB) layout guidelines”
Figure
(applicable to Revision A and higher).
Table
Table
pins.
Table
Table
Table
Updated data sheet status to Product data sheet.
Table 1 and Table 2: added LPC2102FHN48 and LPC2103FHN48.
Table 1, Table 2, Table 3 and related figures: removed LPC2103FA44.
Table 3: updated pad descriptions.
Table 3: updated description of pin 47, SCL1.
Table 3: updated description of pins V
Table 4: changed storage temperature range from 40 C/125 C to 65 C/150 C.
Table 5: added or modified values for I
Table 5: removed “CCLK = 10 MHz” and associated values for I
Section 5: added Figure 3.
Section 11: added Figure 11.
3: added table note 7.
3: modified description of P0.14, RTCX1, RTCX2, XTAL1, XTAL2, JTAG, and DBGSEL
4: modified value for V
5: added and modified values for V
5: Voltage range for pins V
6,
Figure
Data sheet status
Product data sheet
Product data sheet
Preliminary data sheet
Preliminary data sheet
7,
Figure
Rev. 04 — 2 June 2009
control”: added description of Deep power-down mode (applicable to
8: added power consumption data for Deep power-down mode
added.
DD(3V3)
DD(3V3)
.
DDA
DD(act)
and V
hys
and V
.
, I
Single-chip 16-bit/32-bit microcontrollers
Change
notice
DDA
-
-
-
DD(pd)
DD(1V8)
extended to 2.6 V.
, I
BATpd
.
CRP)”: added description of three
LPC2101/02/03
, I
BATact
Supersedes
LPC2101_02_03_3
LPC2101_02_03_2
LPC2101_02_03_1
-
DD(act)
.
.
© NXP B.V. 2009. All rights reserved.
added.
35 of 37