LPC2103FHN48,551 NXP Semiconductors, LPC2103FHN48,551 Datasheet - Page 37
![IC ARM7 MCU FLASH 32K 48-HVQFN](/photos/6/92/69297/48-hvqfn_sot778-3_pkg_sml.jpg)
LPC2103FHN48,551
Manufacturer Part Number
LPC2103FHN48,551
Description
IC ARM7 MCU FLASH 32K 48-HVQFN
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet
1.LPC2102FHN48551.pdf
(37 pages)
Specifications of LPC2103FHN48,551
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Core Processor
ARM7
Core Size
16/32-Bit
Speed
70MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC21
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
8 KB
Interface Type
I2C/JTAG/SPI/SSP/UART
Maximum Clock Frequency
70 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DB-LQFP48-LPC2103, MCB2103, MCB2103U, MCB2103UME, KSK-LPC2103-01, KSK-LPC2103-01PL, KSK-LPC2103-02
Development Tools By Supplier
OM10079, OM10081, OM10090
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48HVQFN EP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
70 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCD568-4302 - BOARD EVAL LPC210X KS2103 JLINK568-4301 - BOARD EVAL LPC210X KS2103568-4300 - BOARD EVAL LPC210X MCB2103568-4297 - BOARD EVAL LPC21XX MCB2100MCB2103UME - BOARD EVAL MCB2103 + ULINK-MEMCB2103U - BOARD EVAL MCB2103 + ULINK2MCB2103 - BOARD EVAL NXP LPC2101/2101/2103622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4690
935287391551
LPC2103FHN48-S
935287391551
LPC2103FHN48-S
NXP Semiconductors
16. Contents
1
2
2.1
2.2
3
3.1
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.5
6.5.1
6.6
6.7
6.7.1
6.8
6.8.1
6.9
6.9.1
6.10
6.10.1
6.11
6.11.1
6.12
6.12.1
6.13
6.13.1
6.14
6.14.1
6.15
6.15.1
6.16
6.16.1
6.17
6.17.1
6.17.2
6.17.3
6.17.4
6.17.5
6.17.6
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . 10
Enhanced features . . . . . . . . . . . . . . . . . . . . . . 1
Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Architectural overview. . . . . . . . . . . . . . . . . . . 10
On-chip flash program memory . . . . . . . . . . . 10
On-chip static RAM. . . . . . . . . . . . . . . . . . . . . 11
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . 11
Interrupt controller . . . . . . . . . . . . . . . . . . . . . 12
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 12
Pin connect block . . . . . . . . . . . . . . . . . . . . . . 12
Fast general purpose parallel I/O . . . . . . . . . . 13
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10-bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
UARTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
I
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SPI serial I/O controller. . . . . . . . . . . . . . . . . . 14
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SSP serial I/O controller . . . . . . . . . . . . . . . . . 15
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
General purpose 32-bit timers/external
event counters . . . . . . . . . . . . . . . . . . . . . . . . 15
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
General purpose 16-bit timers/external
event counters . . . . . . . . . . . . . . . . . . . . . . . . 16
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . 16
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Real-time clock . . . . . . . . . . . . . . . . . . . . . . . . 17
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
System control . . . . . . . . . . . . . . . . . . . . . . . . 17
Crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . 17
PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Reset and wake-up timer . . . . . . . . . . . . . . . . 18
Code security (Code Read Protection - CRP) 19
External interrupt inputs . . . . . . . . . . . . . . . . . 19
Memory mapping control . . . . . . . . . . . . . . . . 19
2
C-bus serial I/O controllers. . . . . . . . . . . . . . 14
6.17.7
6.17.8
6.18
6.18.1
6.18.2
7
8
8.1
9
10
10.1
10.2
11
12
13
14
14.1
14.2
14.3
14.4
15
16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 22
Static characteristics . . . . . . . . . . . . . . . . . . . 23
Dynamic characteristics . . . . . . . . . . . . . . . . . 29
Application information . . . . . . . . . . . . . . . . . 29
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 31
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 34
Revision history . . . . . . . . . . . . . . . . . . . . . . . 35
Legal information . . . . . . . . . . . . . . . . . . . . . . 36
Contact information . . . . . . . . . . . . . . . . . . . . 36
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 19
APB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Emulation and debugging. . . . . . . . . . . . . . . . 20
EmbeddedICE . . . . . . . . . . . . . . . . . . . . . . . . 21
RealMonitor . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Power consumption in Deep power-down
mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
XTAL1 input . . . . . . . . . . . . . . . . . . . . . . . . . . 29
XTAL and RTC Printed Circuit Board (PCB)
layout guidelines. . . . . . . . . . . . . . . . . . . . . . . 30
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 36
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Single-chip 16-bit/32-bit microcontrollers
LPC2101/02/03
Document identifier: LPC2101_02_03_4
Date of release: 2 June 2009
All rights reserved.