EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet - Page 256

IC ARM9 SOC ARM920T 272TFBGA

EP9307-CRZ

Manufacturer Part Number
EP9307-CRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9307-CRZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1138

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7
7-74
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
VERT:
HORZ:
D:
Copyright 2007 Cirrus Logic
Writing a Frame Counter Selection value to this bit selects
which Frame Counter is used for the current 3-bit pixel
value:
0 - use FRAME_CNT3
1 - use FRAME_CNT4
This bit is only defined for address locations GrySclLUTx
Base + 0x000 to GrySclLUTx Base + 0x01C.
Vertical Counter Selection - Read/Write
Writing a Vertical Counter Selection value to this bit
selects which Vertical Counter is used for the current 3-bit
pixel value:
0 - use FRAME_CNT3
1 - use FRAME_CNT4
This bit is only defined for address locations GrySclLUTx
Base + 0x000 to GrySclLUTx Base + 0x01C.
Horizontal Counter Selection - Read/Write
Writing a Horizontal Counter Selection value to this bit
selects which Horizontal Counter is used for the current 3-
bit pixel value:
0 - use FRAME_CNT3
1 - use FRAME_CNT4
This bit is only defined for address locations GrySclLUTx
Base + 0x000 to GrySclLUTx Base + 0x01C.
Matrix Position Enable - Read/Write
DS785UM1

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