ST72F324LJ2T5 STMicroelectronics, ST72F324LJ2T5 Datasheet - Page 140

IC MCU 8BIT 8K FLASH 44-LQFP

ST72F324LJ2T5

Manufacturer Part Number
ST72F324LJ2T5
Description
IC MCU 8BIT 8K FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F324LJ2T5

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-10°C ~ 85°C
Package / Case
44-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 10 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-8242
ST72F324LJ2T5

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ST72324Lxx
14 DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in user pro-
grammable versions (FLASH) as well as in factory
coded versions (ROM). ST72324BL devices are
ROM versions. ST72P324L devices are Factory
Advanced Service Technique ROM (FASTROM)
versions: they are factory-programmed HDFlash
14.1 FLASH OPTION BYTES
The option bytes allows the hardware configura-
tion of the microcontroller to be selected. They
have no address in the memory map and can be
accessed only in programming mode (for example
using a standard ST7 programming tool). The de-
fault content of the FLASH is fixed to FFh. To pro-
gram directly the FLASH devices using ICP,
FLASH devices are shipped to customers with the
internal RC clock source. In masked ROM devic-
es, the option bytes are fixed in hardware by the
ROM code (see option list).
OPTION BYTE 0
OPT7= WDG HALT Watchdog reset on HALT
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT6= WDG SW Hardware or software watchdog
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
140/154
1
Default
7
1
WDG
1
STATIC OPTION BYTE 0
1
1
1
VD
0
1
1
1
1
0
devices. FLASH devices are shipped to customers
with a default content (FFh), while ROM factory
coded parts contain the code supplied by the cus-
tomer. This implies that FLASH devices have to be
configured by the customer using the Option Bytes
while the ROM devices are factory-configured.
OPT5 = CSS Clock security system on/off
Reserved in current silicon revision, must be kept
at default value.
OPT4:3= VD[1:0] Voltage detection
Reserved, must be kept at default value.
OPT2:1 = Reserved, must be kept at default value.
OPT0= FMP_R Flash memory read-out protection
Read-out protection, when selected, provides a
protection against Program Memory content ex-
traction and against write access to Flash memo-
ry.
Erasing the option bytes when the FMP_R option
is selected causes the whole user memory to be
erased first, and the device can be reprogrammed.
Refer to Section 7.3.1 on page 37 and the ST7
Flash Programming Reference Manual for more
details.
0: Read-out protection enabled
1: Read-out protection disabled
1
7
1
STATIC OPTION BYTE 1
OSCTYPE
1
1
0
0
2
1
OSCRANGE
1
1
0
1
0
1

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