ST72F260G1M6 STMicroelectronics, ST72F260G1M6 Datasheet - Page 114

• Manufacturer Part Number: ST72F260G1M6
• Description: MCU 8BIT 4K FLASH ICP 28SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F260G1M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Converters: A/D 6x10b
• Processor Series: ST72F2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: ST7
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-4840

ST72260Gx, ST72262Gx, ST72264Gx
I
I
Read / Write
Reset Value: 0000 0000 (00h)
7-bit Addressing Mode
Bit 7:1 = ADD[7:1] Interface address.
These bits define the I
face. They are not cleared when the interface is
disabled (PE=0).
Bit 0 = ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges
either 0 or 1. It is not cleared when the interface is
disabled (PE=0).
Note: Address 01h is always ignored.
10-bit Addressing Mode
Bit 7:0 = ADD[7:0] Interface address.
These are the least significant bits of the I
address of the interface. They are not cleared
when the interface is disabled (PE=0).
114/172
2
2
ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0
C BUS INTERFACE (Cont’d)
C OWN ADDRESS REGISTER (OAR1)
7
2
C bus address of the inter-
2
C bus
0
I
Read / Write
Reset Value: 0100 0000 (40h)
Bit 7:6 = FR[1:0] Frequency bits.
These bits are set by software only when the inter-
face is disabled (PE=0). To configure the interface
to I
sponding to the microcontroller frequency F
Bit 5:3 = Reserved
Bit 2:1 = ADD[9:8] Interface address.
These are the most significant bits of the I
address of the interface (10-bit mode only). They
are not cleared when the interface is disabled
(PE=0).
Bit 0 = Reserved.
2
C OWN ADDRESS REGISTER (OAR2)
FR1
7
2
C specified delays select the value corre-
FR0
6 to 8 MHz
< 6 MHz
f
CPU
0
0
0
FR1
0
0
ADD9 ADD8
FR0
2
CPU
0
1
C bus
0
0
.