ST72F260G1M6 STMicroelectronics, ST72F260G1M6 Datasheet - Page 40
ST72F260G1M6
Manufacturer Part Number
ST72F260G1M6
Description
MCU 8BIT 4K FLASH ICP 28SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.STEVAL-ISQ002V1.pdf
(172 pages)
Specifications of ST72F260G1M6
Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Converters
A/D 6x10b
Processor Series
ST72F2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
ST7
No. Of I/o's
22
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-4840
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
ST72260Gx, ST72262Gx, ST72264Gx
I/O PORTS (Cont’d)
Table 8. I/O Configurations
Notes:
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
3. For true open drain, these elements are not implemented.
40/172
reading the DR register will read the alternate function output status.
the alternate function reads the pin status given by the DR register content.
PAD
PAD
PAD
V
V
DD
R
DD
R
R
V
PU
PU
PU
DD
NOTE 3
NOTE 3
NOTE 3
PULL-UP
CONDITION
Hardware Configuration
INTERRUPT
CONDITION
OTHER
FROM
PINS
COMBINATIONAL
ALTERNATE
REGISTER
ENABLE
BIT
DR
LOGIC
DR REGISTER ACCESS
REGISTER
REGISTER
DR
DR
SELECTION
From on-chip periphera
POLARITY
DR REGISTER ACCESS
DR REGISTER ACCESS
W
R
ALTERNATE
OUTPUT
R/W
ANALOG INPUT
EXTERNAL INTERRUPT
SOURCE (ei
R/W
ALTERNATE INPUT
To on-chip peripheral
DATA BUS
DATA BUS
l
DATA BUS
x
)