EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 210
EZ80F93AZ020SG
Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3874
EZ80F93AZ020SG
EZ80F93AZ020SG
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PS015313-0508
Flash Interrupt Control Register
There are two sources of interrupts from the Flash controller. These two sources are:
1. Page Erase, Mass Erase, or Row Program completed successfully.
2. An error condition occurred.
Either or both of the two interrupt sources can be enabled by setting the appropriate bits in
the Flash Interrupt Control register.
The Flash Interrupt Control register contains four status bits to indicate the following error
conditions:
•
•
•
•
If the Error Condition Interrupt is enabled, any of the four error conditions result in an
interrupt request being sent to the eZ80F92 device’s Interrupt Controller. Reading the
Flash Interrupt Control register clears all error condition flags and the done flag.
Bit
Position
[0]
BLK0_PROT
Note: *Unused in the eZ80F93 device.
Row Program Time-out
current Row Program operation does not complete within 2,432 Flash controller
clocks (12.4–15.8 ms depending on the Flash controller clock period), the Flash con-
troller terminates the Row Program operation by clearing Bit 2 of the Flash Program
Control register and setting the RP_TMO error bit to 1.
Write Violation
memory (the Write is not performed).
Page Erase Violation
memory (the requested page is not erased).
Mass Erase Violation
more protected blocks in Flash memory (the Mass Erase is not performed).
Value Description
0
1
.
This bit indicates an attempt to write to a protected block of Flash
.
Disable Write/Erase Protect on block 0x00000 to 0x03FFF
Enable Write/Erase Protect on block 0x00000 to 0x03FFF
.
This bit indicates an attempt to erase a protected block of Flash
This bit indicates an attempt to Mass Erase when there are one
.
This bit signals a time-out during Row Programming. If the
Product Specification
eZ80F92/eZ80F93
Flash Memory
203
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