EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 51
EZ80F93AZ020SG
Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3874
EZ80F93AZ020SG
EZ80F93AZ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PS015313-0508
Port x Data Direction Registers
In conjunction with the other GPIO Control Registers, the Port x Data Direction registers,
listed in
39 for more information.
Table 8. Port x Data Direction Registers; (PB_DDR = 009Bh, PC_DDR = 009Fh,
PD_DDR = 00A3h)
Port x Alternate Register 1
In conjunction with the other GPIO Control Registers, the Port x Alternate Register 1,
listed in
39 for more information.
Table 9. Port x Alternate Registers 1; (PB_ALT1 = 009Ch, PC_ALT1 = 00A0h,
PD_ALT1 = 00A4h)
Port x Alternate Register 2
In conjunction with the other GPIO Control Registers, the Port x Alternate Register 2,
listed in
39 for more information.
Table 10. Port x Alternate Registers 2; (PB_ALT2 = 009Dh, PC_ALT2 = 00A1h,
PD_ALT2 = 00A5h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Table
Table
Table
10, control the operating modes of the GPIO port pins. See
8, control the operating modes of the GPIO port pins. See
9, control the operating modes of the GPIO port pins. See
R/W
R/W
R/W
7
1
7
0
7
0
R/W
R/W
R/W
6
1
6
0
6
0
R/W
R/W
R/W
5
1
5
0
5
0
R/W
R/W
R/W
4
1
4
0
4
0
R/W
R/W
R/W
3
1
3
0
3
0
General-Purpose Input/Output
Product Specification
R/W
R/W
R/W
2
1
2
0
2
0
eZ80F92/eZ80F93
Table 6
Table 6
Table 6
R/W
R/W
R/W
1
1
1
0
1
0
on page
on page
on page
R/W
R/W
R/W
0
1
0
0
0
0
44
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