EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 96
EZ80F93AZ020SG
Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3874
EZ80F93AZ020SG
EZ80F93AZ020SG
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PS015313-0508
Real-Time Clock Alarm
Real-Time Clock Oscillator and Source Selection
Real-Time Clock Battery Backup
Real-Time Clock Recommended Operation
The clock can be programmed to generate an alarm condition when the current count
matches the alarm set-point registers. Alarm registers are available for seconds, minutes,
hours, and day-of-the-week. Each alarm can be independently enabled. To generate an
alarm condition, the current time must match all enabled alarm values. For example, if the
day-of-the-week and hour alarms are both enabled, the alarm only occurs at the specified
hour on the specified day. The alarm triggers an interrupt if the interrupt enable bit,
INT_EN, is set. The alarm flag, ALARM, and corresponding interrupt to the CPU are
cleared by reading the RTC_CTRL register.
Alarm value registers and alarm control registers can be written at any time. Alarm
conditions are generated when the count value matches the alarm value. The comparison
of alarm and count values occurs whenever the RTC count increments (one time every
second). The RTC can also be forced to perform a comparison at any time by writing a
0 to the RTC_UNLOCK bit (RTC_UNLOCK is not required to be changed to a 1 first).
The RTC count is driven by either an external 32 kHz on-chip oscillator or a 50/60 Hz
power-line frequency input connected to the 32 kHz RTC_X
compensates for each of these options. The clock source and power-line frequencies are
selected in the RTC_CTRL register. Writing to the RTC_CTRL register resets the clock
divider.
The power supply pin (RTC_V
32 kHz oscillator is isolated from the other power supply pins on the eZ80F92 device.
To ensure that the RTC continues to keep time in the event of loss of line power to the
application, a battery can be used to supply power to the RTC and the oscillator via the
RTC_V
assembly.
Following a RESET from a powered-down condition, the counter values of the RTC are
undefined and all alarms are disabled.
After a RESET from a powered-down condition, the following procedure is
recommended:
•
•
Write to RTC_CTRL to set RTC_UNLOCK and CLK_SEL
Write values to the RTC count registers to set the current time
DD
pin. All V
SS
(ground) pins should be connected together on the printed circuit
DD
) for the Real-Time Clock and associated low-power
OUT
Product Specification
pin. An internal divider
Real-Time Clock
89
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