Z16F3211FI20SG Zilog, Z16F3211FI20SG Datasheet - Page 180

• Manufacturer Part Number: Z16F3211FI20SG
• Description: IC ZNEO MCU FLASH 32K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F3211FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F3x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 2 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4569

Table 89. LIN-UART Address Compare Register (UxADDR)
Table 90. LIN-UART Baud Rate High Byte Register (UxBRH)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
LIN-UART Address Compare Register
LIN-UART Baud Rate High and Low Byte Registers
7
7
The LIN-UART address compare register stores the multi-node network address of the
LIN-UART. When the
address bytes are compared to the value stored in the address compare register. Receive
interrupts and
COMP_ADDR—Compare Address
This 8-bit value is compared to the incoming address bytes.
The LIN-UART baud rate high and low byte registers (see
to create a 16-bit baud rate divisor value (
rate (baud rate) of the LIN-UART.
6
6
RDA
assertions occur only in the event of a match.
MPMD[1]
5
5
P R E L I M I N A R Y
FF-E205H, FF-E215H
FF-E206H, FF-E216H
bit of LIN-UART control register 0 is set, all incoming
COMP_ADDR
4
4
BRH
R/W
R/W
00H
BRG[15:0]
1
3
3
) which sets the data transmission
Table 90
2
2
Product Specification
ZNEO
and
Table
1
1
Z16F Series
91) combine
LIN-UART
0
0
164