Z16F2811AL20SG Zilog, Z16F2811AL20SG Datasheet - Page 81

IC ZNEO MCU FLASH 128K 100LQFP

Z16F2811AL20SG

Manufacturer Part Number
Z16F2811AL20SG
Description
IC ZNEO MCU FLASH 128K 100LQFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheets

Specifications of Z16F2811AL20SG

Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
Z16F2x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
76
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4533

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Low-Power Modes
STOP Mode
HALT Mode
PS022008-0810
Caution:
The ZNEO
Power management functions are divided into three categories to include CPU operating
modes, peripheral power control, and programmable option bits. The highest level of
power reduction is provided through a combination of all functions.
Execution of the ZNEO CPU’s
In STOP mode, the operating characteristics are:
To minimize current in STOP mode, all GPIO pins that are configured as digital inputs
must be driven to one of the supply rails (V
disabled, and WDT must be disabled. The device is brought out of STOP mode using Stop
Mode Recovery. For detailed information on Stop Mode Recovery, see
Mode Recovery
Execution of the ZNEO CPU’s
The following are the operating characteristics in HALT mode:
To prevent excess current consumption when using an external clock source in
IPO is stopped; XIN and XOUT pins are driven to V
System clock is stopped.
ZNEO CPU is stopped.
Program counter (PC) stops incrementing.
If enabled for operation during STOP mode, the WDT and its internal RC oscillator
continue to operate.
If enabled for operation in STOP mode through the associated option bit, the VBO
protection circuit continues to operate.
All other on-chip peripherals are non-active.
STOP Mode, the external clock must be disabled.
System clock is enabled and continues to operate.
ZNEO CPU is stopped.
PC stops incrementing.
®
Z16F Series products contain advanced integrated power-saving features.
on page 58.
P R E L I M I N A R Y
STOP
HALT
instruction places the device into STOP mode. 
instruction places the device into HALT mode.
DD
or V
SS
), the VBO protection must be
SS
.
Product Specification
ZNEO
Low-Power Modes
Reset and Stop
Z16F Series
66

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