C8051F338-GM Silicon Laboratories Inc, C8051F338-GM Datasheet - Page 207

• Manufacturer Part Number: C8051F338-GM
• Description: IC MCU 16K FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F338-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F336DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1427-5

25.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt ser-
vice routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn regis-
ter enables Software Timer mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
Figure 25.5. PCA Software Timer Mode Diagram
W
M
P
1
6
n
x
O
M
E
C
n
PCA0CPMn
C
A
P
P
n
0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
P
W
M
n
C
C
E
F
n
x
Enable
PCA
Timebase
Rev.1.0
PCA0CPLn
PCA0L
16-bit Comparator
PCA0CPHn
PCA0H
C8051F336/7/8/9
Match
C
F
C
R
PCA0CN
0
1
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
207