C8051F413-GM Silicon Laboratories Inc, C8051F413-GM Datasheet - Page 231

• Manufacturer Part Number: C8051F413-GM
• Description: IC 8051 MCU 16K FLASH 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F41xr

Specifications of C8051F413-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 20
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 20x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 2-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1311

24. Timers
Each MCU includes four counter/timers: two are 16-bit counter/timers compatible with those found in the
standard 8051, and two are 16-bit auto-reload timer for use with other device peripherals or for general
purpose use. These timers can be used to measure time intervals, count external events and generate
periodic interrupt requests. Timer 0 and Timer 1 are nearly identical and have four primary modes of oper-
ation. Timer 2 and Timer 3 offer 16-bit and split 8-bit timer functionality with auto-reload. Timer 2 and
Timer 3 also have a smaRTClock Capture Mode that can be used to measure the smaRTClock clock with
respect to another oscillator.
Timers 0 and 1 may be clocked by one of five sources, determined by the Timer Mode Select bits (T1M-
T0M) and the Clock Scale bits (SCA1-SCA0). The Clock Scale bits define a pre-scaled clock from which
Timer 0 and/or Timer 1 may be clocked (See SFR Definition 24.3 for pre-scaled clock selection).
Timer 0/1 may then be configured to use this pre-scaled clock signal or the system clock. Timer 2 and
Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
clock source divided by 8.
Timer 0 and Timer 1 may also be operated as counters. When functioning as a counter, a counter/timer
register is incremented on each high-to-low transition at the selected input pin (T0 or T1). Events with a fre-
quency of up to one-fourth the system clock's frequency can be counted. The input signal need not be peri-
odic, but it must be held at a given level for at least two full system clock cycles to ensure the level is
properly sampled.
24.1. Timer 0 and Timer 1
Each timer is implemented as a 16-bit register accessed as two separate bytes: a low byte (TL0 or TL1)
and a high byte (TH0 or TH1). The Counter/Timer Control register (TCON) is used to enable Timer 0 and
Timer 1 as well as indicate status. Timer 0 interrupts can be enabled by setting the ET0 bit in the IE register
(
setting the ET1 bit in the IE register (
modes selected by setting the Mode Select bits T1M1-T0M0 in the Counter/Timer Mode register (TMOD).
Each timer can be configured independently. Each operating mode is described below.
24.1.1. Mode 0: 13-bit Counter/Timer
Timer 0 and Timer 1 operate as 13-bit counter/timers in Mode 0. The following describes the configuration
and operation of Timer 0. However, both timers operate identically, and Timer 1 is configured in the same
manner as described for Timer 0.
The TH0 register holds the eight MSBs of the 13-bit counter/timer. TL0 holds the five LSBs in bit positions
TL0.4-TL0.0. The three upper bits of TL0 (TL0.7-TL0.5) are indeterminate and should be masked out or
ignored when reading. As the 13-bit timer register increments and overflows from 0x1FFF (all ones) to
0x0000, the timer overflow flag TF0 (TCON.5) is set and an interrupt will occur if Timer 0 interrupts are
enabled.
Section “12.4. Interrupt Register Descriptions” on page 112
8-bit counter/timer with auto-reload
Timer 0 and Timer 1 Modes:
Two 8-bit counter/timers
13-bit counter/timer
16-bit counter/timer
(Timer 0 only)
Section 12.4
Two 8-bit timers with auto-reload Two 8-bit timers with auto-reload
16-bit timer with auto-reload
Timer 2 Modes:
Rev. 1.1
). Both counter/timers operate in one of four primary
); Timer 1 interrupts can be enabled by
C8051F410/1/2/3
16-bit timer with auto-reload
Timer 3 Modes:
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