C8051F500-IQ Silicon Laboratories Inc, C8051F500-IQ Datasheet - Page 181
![IC 8051 MCU 64K FLASH 48-QFP](/photos/12/17/121756/c8051f500-iq_sml.jpg)
C8051F500-IQ
Manufacturer Part Number
C8051F500-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F500-IQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 32 Channel
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1530 - ADAPTER PROG TOOLSTICK F500336-1529 - PLATFORM PROG TOOLSTCK F500336-1527 - KIT DEV FOR C8051F50X336-1526 - BOARD PROTOTYPE W/C8051F500
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1510
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F500-IQ
Manufacturer:
SiliconL
Quantity:
300
Company:
Part Number:
C8051F500-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F500-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Registers XBR0, XBR1, and XBR2 are used to assign the digital I/O resources to the physical I/O Port
pins. Note that when the SMBus is selected, the Crossbar assigns both pins associated with the SMBus
(SDA and SCL); and similarly when the UART, CAN or LIN are selected, the Crossbar assigns both pins
associated with the peripheral (TX and RX). UART0 pin assignments are fixed for bootloading purposes:
UART TX0 is always assigned to P0.4; UART RX0 is always assigned to P0.5. CAN0 pin assignments are
fixed to P0.6 for CAN_TX and P0.7 for CAN_RX. Standard Port I/Os appear contiguously after the priori-
tized functions have been assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, pending the state of the
NSSMD1–NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not
be routed to a Port pin.
As an example configuration, if CAN0, SPI0 in 4-wire mode, and PCA0 Modules 0, 1, and 2 are enabled on
the crossbar with P0.1, P0.2, and P0.5 skipped, the registers should be set as follows: XBR0 = 0x06
(CAN0 and SPI0 enabled), XBR1 = 0x0C (PCA0 modules 0, 1, and 2 enabled), XBR2 = 0x40 (Crossbar
enabled), and P0SKIP = 0x26 (P0.1, P0.2, and P0.5 skipped). The resulting crossbar would look as shown
in Figure 20.4.
Port
Special
Function
Signals
PIN I/O
UART_TX
UART_RX
CAN_TX
CAN_RX
SCK
MISO
MOSI
NSS
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
CEX5
ECI
T0
T1
LIN_TX
LIN_RX
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
P0
Figure 20.3. Peripheral Availability on Port I/O Pins
P1
Rev. 1.1
P2
C8051F50x-F51x
available on the 48-pin
P3.1-P3.7, P4.0 only
and 40-pin packages
P3
available on the 48-
P4.1-P4.7 only
pin packages
P4
181
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