C8051F500-IQ Silicon Laboratories Inc, C8051F500-IQ Datasheet - Page 210
![IC 8051 MCU 64K FLASH 48-QFP](/photos/12/17/121756/c8051f500-iq_sml.jpg)
C8051F500-IQ
Manufacturer Part Number
C8051F500-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F500-IQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 32 Channel
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1530 - ADAPTER PROG TOOLSTICK F500336-1529 - PLATFORM PROG TOOLSTCK F500336-1527 - KIT DEV FOR C8051F50X336-1526 - BOARD PROTOTYPE W/C8051F500
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1510
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F500-IQ
Manufacturer:
SiliconL
Quantity:
300
Company:
Part Number:
C8051F500-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F500-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Note: These registers are used in both master and slave mode. The register bits marked with (m) are accessible only in
LIN0CTRL
LIN0SIZE
LIN0ERR
LIN0MUL
C8051F50x-F51x
21.7.2. LIN Indirect Access SFR Registers Definitions
Table 21.4 lists the 15 indirect registers used to configured and communicate with the LIN controller.
210
LIN0DT1
LIN0DT2
LIN0DT3
LIN0DT4
LIN0DT5
LIN0DT6
LIN0DT7
LIN0DT8
LIN0DIV
LIN0ST
LIN0ID
Name
Master mode while the register bits marked with (s) are accessible only in slave mode. All other registers are
accessible in both modes.
Address
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
ENHCHK
STOP(s)
ACTIVE
Table 21.4. LIN Registers (Indirectly Addressable)
Bit7
PRESCL[1:0]
SLEEP(s)
IDLTOUT ABORT(s) DTREQ(s)
Bit6
TXRX
Bit5
ID5
Rev. 1.1
SYNCH(s) PRTY(s)
DTACK(s)
Bit4
ID4
DIVLSB[7:0]
DATA1[7:0]
DATA2[7:0]
DATA3[7:0]
DATA4[7:0]
DATA5[7:0]
DATA7[7:0]
DATA8[7:0]
DATA67:0]
LINMUL[4:0]
RSTINT RSTERR WUPREQ STREQ(m)
LININT
Bit3
ID3
ERROR
TOUT
Bit2
ID2
LINSIZE[3:0]
WAKEUP
Bit1
CHK
ID1
BITERR
DONE
DIV9
Bit0
ID0
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