MC908AP32CFBE Freescale Semiconductor, MC908AP32CFBE Datasheet - Page 232

IC MCU 32K FLASH 8MHZ 44QFP

MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
IC MCU 32K FLASH 8MHZ 44QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Multi-Master IIC Interface (MMIIC)
14.3 I/O Pins
The MMIIC module uses two I/O pins, shared with standard port I/O pins. The full name of the MMIIC I/O
pins are listed in
The SDA and SDL pins are open-drain. When configured as general purpose output pins (PTB0 and
PTB1), pullup resistors must be connected to these pins.
14.4 Multi-Master IIC System Configuration
The multi-master IIC system uses a serial data line SDA and a serial clock line SCL for data transfer. All
devices connected to it must have open collector (drain) outputs and the logical-AND function is
performed on both lines by two pull-up resistors.
230
$004C
$004D
$0048
$0049
$004A
$004B
$004E
$004F
Addr.
MMIIC Generic Pin Names:
MMIIC CRC Data Register
MMIIC Frequency Divider
MMIIC Control Register 1
MMIIC Control Register 2
MMIIC Address Register
MMIIC Status Register
Register Name
MMIIC Data Transmit
MMIIC Data Receive
SDA
SCL
Table
(MMCRDR)
(MMADR)
(MMCR1)
(MMCR2)
(MMDTR)
(MDDRR)
(MMFDR)
(MMSR)
Register
Register
Register
14-1. The generic pin name appear in the text that follows.
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read: MMRXIF
Read:
Read:
Read: MMCRCD7 MMCRCD6 MMCRCD5 MMCRCD4 MMCRCD3 MMCRCD2 MMCRCD1 MMCRCD0
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Figure 14-1. MMIIC I/O Register Summary
Table 14-1. Pin Name Conventions
MC68HC908AP Family Data Sheet, Rev. 4
MMALIF
MMRD7
MMAD7
MMTD7
MMEN
Full MCU Pin Names:
Bit 7
1
0
0
0
0
0
0
0
0
0
0
PTB0/SDA
PTB1/SCL
= Unimplemented
MMNAKIF
MMTXIF
MMRD6
MMAD6
MMTD6
MMIEN
6
0
0
0
0
0
0
0
0
0
0
0
MMCLRBB
MMATCH
MMRD5
MMAD5
MMTD5
MMBB
5
1
0
0
0
0
0
0
0
0
0
MMSRW
MMRD4
MMAD4
MMAST
MMTD4
4
0
0
0
0
0
0
0
0
0
0
Pin Selected for MMIIC Function By:
MMEN bit in MMCR1 ($0049)
MMTXAK
MMRXAK MMCRCBF MMTXBE
MMAD3
MMRD3
MMTD3
MMRW
3
0
0
0
1
0
0
0
0
0
REPSEN
MMAD2
MMRD2
MMBR2
MMTD2
2
0
0
0
0
0
0
0
0
1
Freescale Semiconductor
MMCRCBYTE
MMAD1
MMRD1
MMBR1
MMTD1
1
0
0
0
0
1
0
0
0
0
MMEXTAD
MMCRCEF
Unaffected
MMRXBF
MMTD0
MMRD0
MMBR0
Bit 0
0
0
0
0
0
0
0
0

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