MC908AP32CFBE Freescale Semiconductor, MC908AP32CFBE Datasheet - Page 285

• Manufacturer Part Number: MC908AP32CFBE
• Description: IC MCU 32K FLASH 8MHZ 44QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32CFBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 19
Computer Operating Properly (COP)
19.1 Introduction
The computer operating properly (COP) module contains a free-running counter that generates a reset if
allowed to overflow. The COP module helps software recover from runaway code. Prevent a COP reset
by clearing the COP counter periodically. The COP module can be disabled through the COPD bit in the
configuration register 1 (CONFIG1).
19.2 Functional Description
Figure 19-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit prescaler counter. If not cleared by
software, the COP counter overflows and generates an asynchronous reset after 2
ICLK cycles, depending on the state of the COP rate select bit, COPRS, in the CONFIG1 register. With
a 2
value to location $FFFF before an overflow occurs prevents a COP reset by clearing the COP counter
and stages 12 through 5 of the prescaler.
Freescale Semiconductor
13
INTERNAL RESET SOURCES
– 2
(COPRS FROM CONFIG1)
4
(COPD FROM CONFIG1)
RESET VECTOR FETCH
ICLK cycle overflow option, a 88-kHz ICLK gives a COP timeout period of ~93ms. Writing any
STOP INSTRUCTION
shows the structure of the COP module.
COPEN (FROM SIM)
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
RESET
ICLK
MC68HC908AP Family Data Sheet, Rev. 4
Figure 19-1. COP Block Diagram
12-BIT COP PRESCALER
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
RESET STATUS REGISTER
RESET CIRCUIT
18
– 2
4
or 2
13
– 2
4
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