SAK-XC2267-96F66L AC Infineon Technologies, SAK-XC2267-96F66L AC Datasheet - Page 72
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SAK-XC2267-96F66L AC
Manufacturer Part Number
SAK-XC2267-96F66L AC
Description
IC MCU 16BIT FLASH PG-LQFP-100
Manufacturer
Infineon Technologies
Series
XC22xxr
Datasheet
1.SAK-XC2264-56F66L_AC.pdf
(116 pages)
Specifications of SAK-XC2267-96F66L AC
Core Processor
C166SV2
Core Size
16/32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
DMA, I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
82K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KX226796F66L82ACXT
SAK-XC2267-96F66L82 AC
SAK-XC2267-96F66L82ACINTR
SAK-XC2267-96F66L82ACINTR
SAK-XC2267-96F66LACINTR
SP000250942
SAK-XC2267-96F66L82 AC
SAK-XC2267-96F66L82ACINTR
SAK-XC2267-96F66L82ACINTR
SAK-XC2267-96F66LACINTR
SP000250942
Table 12
Parameter
External Pin Load
Capacitance
Voltage Regulator Buffer
Capacitance for DMP_M
Voltage Regulator Buffer
Capacitance for DMP_1
Operating frequency
Ambient temperature
1) If both core power domains are clocked, the difference between the power supply voltages must be less than
2) Performance of pad drivers, A/D Converter, and Flash module depends on
3) Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin
4) Not subject to production test - verified by design/characterization.
5) An overload current (
6) The timing is valid for pin drivers operating in default current mode (selected after reset). Reducing the output
7) To ensure the stability of the voltage regulators the EVRs must be buffered with ceramic capacitors. Separate
8) The operating frequency range may be reduced for specific types of the
Data Sheet
10 mV. This condition imposes additional constraints when using external power supplies.
Do not combine internal and external supply of different core power domains.
Do not supply the core power domains with two independent external voltage regulators. The simplest method
is to supply both power domains directly via a single external power supply.
If the external supply voltage
generated. Otherwise, the core supply voltage
parasitic effects.
This power reset can be generated by the on-chip SWD. If the SWD is disabled the power reset must be
generated by activating the PORST input.
exceeds the specified range:
overload currents on all pins may not exceed 50 mA. The supply voltages must remain within the specified
limits. Proper operation under overload conditions depends on the application.
Overload conditions must not occur on pin XTAL1 (powered by
adds to that pin’s leakage current (
defined by the overload coupling factor
polarity of the overload current that produces it.
The total current through a pin is |
voltage on analog inputs.
current may lead to increased delays or reduced driving capability (
buffer capacitors with the recomended values shall be connected as close as possible to each
the resistance of the board tracks below 2 Ω. Connect all
The minimum capacitance value is required for proper operation under all conditions (e.g. temperature).
Higher values slightly increase the startup time.
device designation (…FxxL). 80-MHz devices are marked …F80L.
Operating Condition Parameters (cont’d)
I
OV
) through a pin injects an error current (
V
DDP
V
Symbol
C
C
C
f
T
OV
SYS
I
A
L
EVRM
EVR1
TOT
I
becomes lower than the specified operating range, a power reset must be
OZ
>
| = |
). The value of the error current depends on the overload current and is
V
IHmax
K
I
OZ
OV
| + (|
. The polarity of the injected error current is reversed from the
(
Min.
–
1.0
0.47
–
–
I
OV
I
V
> 0) or
OV
DDI
70
| ×
may rise above its specified operating range due to
K
Values
Typ.
20
–
–
–
–
OV
V
V
). The additional error current may distort the input
OV
DDI1
<
pins together.
V
I
V
INJ
DDI
ILmin
Max.
–
4.7
2.2
80
–
) into the adjacent pins. This error current
C
XC2000 Family Derivatives
).
L
).
(
I
OV
XC226x
< 0). The absolute sum of input
V
DDP
Unit Note /
pF
µF
µF
MHz
°C
Electrical Parameters
.
XC2267 / XC2264
. This is indicated in the
Test Condition
Pin drivers in
default mode
7)
One for each
supply pin
8)
See
Table 1
V2.1, 2008-08
V
DDI
pin to keep
7)
6)